The Synopsys ARC® 725D configurable processor core is a full-featured, high performance embedded processor core that delivers extremely compact die area and low power . The ARC 725D processor core is ideal for demanding embedded SoC applications in consumer, networking, automotive and other markets.
Powerful DSP options enable the Synopsys ARC 725D processor core to efficiently perform more of the functions of the SoC, eliminating the need for separate logic or DSP blocks. Optional custom instruction extensions may be incorporated to achieve application performance levels unattainable with fixed architecture cores.
The ARC 725D processor core is supported by a full suite of software and hardware development tools. The suite includes the MetaWare Development Kit, which generates highly efficient code that is ideal for embedded applications and ARC simulators including xCAM and nSIM, and the ARChitect configuration tool.
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Synopsys ARC 725D Datasheet
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- A highly configurable architecture allows SoC designers to include only the core features that are required for their specific application, resulting in smaller die size and lower power than can be achieved with a fixed core.
- User-defined instruction and register extensions deliver 5 - 100 times performance improvement of critical routines.
- Includes instruction and data cache support, and closely coupled (single-cycle) memories provide fast, predictable computation.
- Built-in DSP features include instruction and register extensions that accelerate signal processing algorithms.
- Optional ARC XY Advanced DSP subsystem delivers the performance of dedicated DSP cores.
- Synopsys ARCompact™ 16- / 32-bit Instruction Set Architecture reduces code size by up to 40 percent compared to 32-bit only instruction sets.
- Inter-core communication ISA support, multi-core debug environment and flexible interfaces enable multi-core designs.
- JTAG debug port and optional embedded hardware breakpoints facilitate software debug.
- Delivered as synthesizable RTL source code (Verilog®), the Synopsys ARC 725D core is fully compatible with industry standard design methodologies and tool flows.
|ARC 725D high-performance, 32-bit processor core with cache, DSP, FPU||STARs
||ARC 725D high-performance, 32-bit processor core with cache, DSP, FPU
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Application NotesARC Processors Not Susceptible to Meltdown and Spectre Vulnerabilities ( PDF )
Design-For-Test Implementation ( PDF )
Getting Started with Embedded Programming on ARC ( PDF )
Optimizing DPFPfast Floating Point Extension for Lower Cycle Count ( PDF )
Pipeline Stall Hazards ( PDF )
XY-Memory Pointer Buffer Update ( PDF )
DatabooksARC 700 Databook ( PDF )
ARC RDF Synplicity Databook ( PDF )
ARC RDF Xilinx Databook ( PDF )
DatasheetSynopsys ARC 725D Datasheet ( PDF )
QuickStartsARC Synopsys RDF Getting Started ( PDF )
ML50x Development Board Getting Started 4.90b ( PDF )
Reference ManualsARC 700 DSPlib Reference ( PDF )
ARC HAPS51 Board Connections and Settings Reference Manual ( PDF )
ARCompact ISA Programmers Reference ( PDF )
ARC® 700 DSP Options Reference ( PDF )
Release NotesARC ML509 Development Systems Release Notes ( PDF )
ARC Synopsys RDF Release Notes ( PDF )
Success StoryARC 700 on Altera FPGA ( PDF )
TutorialEIA Cookbook ( PDF )
User GuideARC Synopsys RDF User Guide ( PDF )
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