Nitin Kalra, Sr. Manager, Applications Engineering from Synopsys, will discuss how metal fills play a substantial role in deciding the performance of chips and reliability. Designers ultimate goal is to balance the effect of metal fill on performance without sacrificing reliability. This balancing act results in a highly iterative process and use of the Actual Metal Fill (AMF) tool for ECO phase increases the turnaround time. Instead the Virtual Metal Fill (VMF) tool can be used during the ECO phase and the design can be brought to the Signoff level where the AMF tool can be used. StarRC VMF results correlate well with IC Validator AMF results, further increasing design flow efficiency.