Definition
Programmable Electrical Rules Checking (PERC) is a method for checking reliability issues of integrated circuit (IC) designs that cannot be checked with design rule checking (DRC) or layout versus schematic (LVS). These reliability checks are frequently electrostatic discharge (ESD) related, but they can extend to other checks as well, including electrical overstress (EOS), dielectric breakdown, etc. These rules involve connectivity and netlist information, but also need to support full customization from design to design, which is enabled by the programmable aspect.
PERC checks fall into 4 major categories:
- Netlist Checks. Checks that can be done entirely on a netlist; no layout data is necessary.
- Netlist Driven Layout Checks. Checks that are done on the layout, but a preceding analysis of a netlist is done to determine the area of interest for the layout check.
- Current Density Checks. Checks done on the layout to determine the current carrying capability of the layout in the ESD discharge path.
- Point-to-Point (P2P) Resistance Checks. Checks done on the layout to determine the resistance of the ESD discharge path, to verify that it is low resistance ensuring the current will choose that path.