ASIP University Day: Domain-Specific Processor Design using ASIP Designer

Application-specific instruction set processors (ASIPs) have established themselves as an important implementation option for modern SoCs, i.e. when standard processor IP cannot meet challenging application-specific requirements, and fixed hardware is not flexible enough.  Heterogeneous multicore systems including ASIPs are now becoming more mainstream. Domains such as artificial intelligence, image and video processing or automated driving assistance have fueled the development of such ASIPs, and triggered many university projects.  Processor design projects such as the RISC-V initiative also initiated a lot of interest.  With all the commercial activity around RISC-V these days, it has outgrown UC Berkeley.

Synopsys ASIP Designer is the market leading tool for ASIP design, verification, and programming. It is used by leading companies around the globe with hundreds of successful projects to date.

At this informal event, leading university teams will present results from their ongoing ASIP projects in a variety of application domains. Synopsys will share insight on market trends, and provide a technical update on ASIP Designer along with reference examples. 

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03:00 - 03:10 PM CET
Opening Remarks
  • Falco Munsche, Technical Marketing Manager, ASIP Tools, Synopsys
03:10 - 03:55 PM CET
Application-Specific Processors (ASIPs) in System-on-Chip Design: Market, Introduction to ASIP Designer, and University Program
  • Falco Munsche, Patrick Verbist, ASIP Tools, Synopsys
03:55 - 04:00 PM CET
04:00 - 04:30 PM CET
Utilizing ASIP Designer for RISC-V and Vector Co-processor Compiler Generation
  • Lennart Reimann, Institute of Communication Technologies and Embedded Systems (ICE), RWTH Aachen University
04:30 - 05:00 PM CET
SmarT: An Efficient ASIP for Medium-Complexity AI Application
  • Erik Brockmeyer, Sr. Staff Applications Engineer, ASIP Tools, Synopsys
05:00 - 05:30 PM CET
Mixed-precision Quantization-based SIMD RISC-V Extensions
  • Yimin Gao, High-Performance Low-Power Lab, University of Virginia
05:30 - 05:40 PM CET
05:40 - 06:10 PM CET
Design of an Application-Specific Integrated Processor for Kyber
  • Robin Geens, Computer Security and Industrial Cryptography (COSIC) Research Group, KU Leuven University
06:10 - 06:40 PM CET
Automatic Generation of SVA properties for Formal Verification in ASIP Designer
  • Björn Hartmann, R&D Engineer, ASIP Tools, Synopsys
06:40 - 06:50 PM CET
06:50 - 07:20 PM CET
Accelerator-assisted ASIP for Communication and Positioning in Beyond-5G Systems
  • Mohammed Attari, Electrical and Information Technology (EIT) Department, Lund University
07:20 - 07:50 PM CET
ASIP-Driven Advancements in 5G IoT Wireless Modems: Baseband Kernel Complexity and Optimization
  • Faisan Qureshi, Chair of Mobile Communications, Dresden University of Technology
07:50 - 07:55 PM CET
Closing Remarks