Aerospace & Defense Newsletter

A quarterly newsletter on aerospace and defense

Issue #1

Welcome to the Aerospace & Defense Newsletter

In each of these newsletters we’ll provide an update on different topics and areas where Synopsys has been working across the industry on strategic technologies. With a renewed focus on microelectronics security, this edition will describe our ongoing work with DARPA on their Automatic Implementation of Secure Silicon (AISS) program. Read the one-on-one interview with Chief Security Officer, Deirdre Hanford where she discusses Synopsys’ role in driving the AISS program to success.

Let us know what you’d like to see in future newsletters by taking our survey and choosing from “Beyond Moore” technology areas like Synopsys’ program with IARPA to provide commercial grade tools for superconducting design, custom design and verification innovations like Synopsys’ work on the DARPA ERI “POSH AMS Emulation” program or the latest innovations in RHBD, 3D IC, AI and end-to-end prototyping.


Synopsys has created many technical webinars to keep our aerospace and defense customers up to date on the latest Synopsys innovations. See the links below:

Shifting Left to Accelerate Security Approvals for ATOs in Defense Programs
In this webinar, Join Joe Jarzombek (USAF Lt. Col., retired) as he discusses means for successfully scaling responsiveness with a secure SDLC.

Mitigating Software Risks for DoD and Government Agencies
This presentation addresses a means of using information to prioritize mitigation efforts focused on reducing exploitable attack vectors; enabling organizations to proactively harden their attack surface and become more resilient in the face of growing threats and asymmetric attacks. 

Break Free from Wi-Fi: Create Secure, Global, Cellular Devices with iSIM
In this webinar, Truphone & Synopsys describe the crucial concerns around security, simplicity and reliable connectivity to create a truly scalable solution for secure, global mobile IoT deployments. 

Fast FPGA Design Debug using Integrated Platform Solution
This webinar introduces the Identify® RTL debugger and its ability to instrument RTL HDL while still at the RT-Level and debug the implemented FPGA on live, running hardware.

Tackling Reliability Challenges in Analog and Mixed-Signal Designs
This webinar describes how Synopsys Custom Design Platform is helping design engineers to address reliability challenges in analog and custom designs.