Learn From The Experts

Featuring technology experts, Synopsys ASIP webinars and conferences give you access to a variety of topics around our ASIP portfolio. Watch them at your leisure.

Overview

Event Type

Application

Title

Language

RISC-V & AI

ASIP Designer enables the creation of custom vector DSPs for AI

English

RISC-V & AI & Wireless & Cryptography

Domain-Specific Processor Design using ASIP Designer

English

Low-Power Smart Vision and Post-Quantum Cryptography

Case Studies in Low-Power Smart Vision and Post-Quantum Cryptography Applications

English

RISC-V Processor

Developing Your Own RISC-V Processor with Fast Architecture-Driven PPA Optimization

English

AI Accelerators

Domain-Specific Processor Design using ASIP Designer

English

5G

ASIPs for 5G Wireless SoCs

English

SLAM

Designing ASIPs for Smart Vision Systems: A SLAM Case study

English

AI

Extending RISC Processors into Flexible Accelerators using ASIP Designer

English

RISC-V & AI

Domain-Specific Processor Design using ASIP Designer

English

AI & 5G

Domain-Specific Processor Design using ASIP Designer -  Proceedings only

English

DCLS

Efficient Dual-Core Lock-Step Processor Design with ASIP Designer: An ST STxP5 Case Study

English

RISC-V & AI

Domain-Specific Processor Design using ASIP Designer

English

RISC-V & AI & Cryptography

ASIP開発ソリューション・セミナー2023

Japanese

SLAM

Designing ASIPs for Smart Vision Systems: A SLAM Case study

Japanese

ASIP開発ソリューション・セミナ2020

ASIP Develop Solutions

Japanese

Post-Quantum Cryptography

使用 ASIP Designer 将 RISC 处理器扩展为灵活的加速器

后量子密码学应用的案例研究

Extending RISC Processors into Flexible Accelerators using ASIP Designer

Case Study in Post-Quantum Cryptography Application

Chinese

AI

使用 ASIP Designer 将 RISC 处理器扩展为灵活的加速器

Extending RISC Processors into Flexible Accelerators using ASIP Designer

Chinese

RISC-V

Development of RISC-V Processor with Fast, Architecture-Driven, PPA Optimization

Chinese