Hybrid Prototyping

Seamlessly Integrate Virtualizer Virtual Prototypes with HAPS Series FPGA-based Prototypes

Today, designers use two relatively independent methods for SoC prototyping: transaction-level model (TLM)-based virtual prototyping and FPGA-based prototyping. Virtual prototyping is ideal for accelerating pre-RTL software development by executing fast TLMs and providing more efficient debug and analysis scenarios. FPGA-based prototyping provides cycle-accurate, high-performance execution and real-world interface connectivity. Synopsys' hybrid prototyping solution blends the strengths of both virtual and FPGA-based prototyping to enable software development and system integration much sooner in the project lifecycle.

Synopsys' hybrid prototyping solution enables hardware and software engineers to:

  • Get the best of both worlds with a hybrid prototype that seamlessly links virtual and FPGA-based prototypes
  • Start multi-core SoC prototyping earlier and achieve high-performance execution of system-level models with directly connected real-world hardware interfaces
  • Partition SoC design blocks between virtual and FPGA-based prototype environments to maximize overall prototype performance
  • Improve debug visibility and control of software under development through the Virtualizer-based environment
  • Accelerate system bring-up by using virtual prototyping for new design blocks and FPGA-based prototyping for existing logic
  • Easily integrate high-performance ARM® Cortex™ processor models, transactors for ARM AMBA® interconnect and Synopsys DesignWare® IP with the rest of your design into a single hybrid prototype

Transactors for data exchange between virtual and FPGA-based prototypes are available for HAPS-80, HAPS-70, or HAPS-DX Series systems. ProtoCompiler is a comprehensive set of software tools and libraries to support hybrid prototyping or transaction-based verification.

Chart showing the integration of Virtualizer Virtual Prototypes with HAPS series