DVCon US 2020

March 2 - 5, 2020
Doubletree Hotel, San Jose


Why Attend?

Synopsys is the world’s leading provider of solutions for designing and verifying advanced silicon chips. Visit us at DVCon US 2020 to learn how we help customers optimize chips for power, performance, and cost and cut months off their project schedules. 

Visit Synopsys Booth #101

Come and meet with our experts to learn how Synopsys delivers comprehensive verification solution spanning the compete design cycle, including simulation, emulation, advanced debug, static / formal verification, FPGA-based prototyping and virtual prototyping. 

Exhibit Hours:
Monday, March 2            5:00 p.m. - 7:00 p.m.
Tuesday, March 3           2:30 p.m. - 6:00 p.m.
Wednesday, March 4     2:30 p.m. - 6:00 p.m.



Join Synopsys' Sponsored Luncheon

Industry Leaders Verify with Synopsys
Date: Wednesday, March 4, 2020
Time: 12:00 p.m. – 1:15 p.m. PT

You will hear industry experts share their viewpoints on what is driving SoC complexity, how their teams have achieved success, how you can apply their insights on your next project as well as discussions about the latest developments in the verification landscape and advanced technology.

Also, make sure to mark your calendars for Synopsys featured sessions:




Deploying Simulation on Cloud for Faster Time to Market and Higher Quality Verification

Date: Thursday, March 5, 2020
Time: 8:30 a.m. - 11:30 a.m. PT
Location: Siskiyou


Melvin Cardozo - Synopsys, Inc.
Richard Paw - Amazon Web Services, Inc.

Today's SoC designs require increasing amounts of simulation cycles, driving the need for more compute resources. An increasing number of users are seeking solutions that take advantage of the elastic hardware scalability offered in the cloud to address peak/burst simulation capacity requirements, enabling a higher quality verification on a predictable schedule. Moving verification workloads to the cloud, however, brings a unique set of challenges, such as hardware instance selection, file system configuration, and job orchestration.

In this tutorial, cloud architects from leading cloud providers, verification experts from Synopsys, and customers using this methodology will address these challenges, and demonstrate an SDK including all the scripts required to set up a complete verification environment on the cloud. This demonstration will include all the components essential to develop, compile, run and debug simulations in a cloud environment optimized for verification workloads.

Sponsored Workshop

The Exascale Debug Challenge – Time to Leave Old Debug Methods Behind

Date: Thursday, March 5, 2020
Time: 1:00 p.m. - 2:30 p.m. PT
Location: Cascade


Ribhu Mittal - Synopsys, Inc.
Melvyn Goveas - Synopsys, Inc.

Today’s chips have multi-billion gate complexity and have to execute billions of test cycles before tapeout. Billions of gates times billions of test cycles, equals an exascale challenge, and requires new thinking for debugging of hardware and software. The old emulation paradigm of run-stop-dump-debug that has been in use for 20+ years is hitting the wall with due to the complexity of exascale debug. In this workshop you will learn about a more effective debug methodology that advances the debug abstraction to the system-level and considers a higher-level view of the system behavior compared to just looking at signal behavior in waveforms. In addition to covering the methodology, we will share a realistic case study to demonstrate how to find deeply hidden hardware and software bugs in your design.

Audience: Verification engineers using emulation for debug. Verification managers and project managers looking to improve project schedules.

See you at DVCon US 2020!