System On and In Chip Solutions

Overview of Services

  • SoC Optimization, Architecture and Integration
    • End-to-End Block, Subsystem and SoC Design and Verification Services from architecture through GDSII services with commercial and customer IP
    • Software / Hardware Virtual Prototyping & Co-design
    • Comprehensive DesignWare IP and Subsystem Portfolio services
    • Arm core integration, configuration, verification and hardening
    • Analog block integration
    • Low power, micro-architecture (UPF)
      • Multi-mode multi-corner optimization
      • Multi-bit cell-inferencing
      • Multi-Vt leakage optimization
      • Clock gating
      • Power intent
    • HAPS Prototyping solution including DesignWare IP Prototyping Kits Integration

 

  • RTL Design and Verification
    • Logic Design
    • Specification and verification plan development
    • Software (C/ASM) based verification
    • HW/SW System Architecture and Validation
    • End-to-End Performance/Watt validation
    • Constrained Random SystemVerilog UVM methodology
    • Functional/Code Coverage
    • Emulation, Virtual, Hybrid (Zebu)
    • Synthesis
    • Floor planning
    • Place & Route 
    • Test (DFT/ATPG)
    • Static Timing Analysis
    • Power Optimization
  • Design Technology Co-Optimization (DTCO) services

Related Resources

Want to learn more about our SoC Design Services?