Detailed measurements from the chip on all aspects of its operation are needed to obtain the knowledge required for effective analysis and decision-making during the silicon lifecycle process. Sources of this data include environmental process/voltage/temperature (PVT) monitors, design for test (DFT) and built-in self-test (BIST) resources, structural monitors for path margin analysis and functional monitors to measure clock delay and other activities, The data from the monitors is then transported off chip and stored in a unified SLM database ready to be analysed. Based on this analysis, insightful decisions can then be made and action taken.
Combining silicon operational data extracted during each lifecycle stage adds an extra dimension to the data richness. Targeted analytics are performed at each lifecycle stage to drive optimizations specific to each phase. The expanded knowledge base greatly enhances the analytics and optimizations possible at each lifecycle stage.