Viettel High Tech, the R&D arm of Viettel, Vietnam's largest mobile network operator, is leading the charge in developing 5G technology at the system, equipment, and SoC levels. By designing full 5G network architecture systems—including devices, radio access networks (RAN), transmission networks, and core networks—Viettel is positioning Vietnam as one of the few countries capable of producing 5G equipment. Faced with the challenge of accelerating their time to market, Viettel High Tech turned to Synopsys for a comprehensive EDA solution to streamline their design process.

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The Viettel High Tech team faced several significant challenges in their ambitious project:

  • Emerging 5G Standards: Developing solutions while the 5G standard was still evolving, necessitating adaptability.
  • Time-to-Market Pressure: Accelerating the design process to gain a competitive edge in a fast-paced industry.
  • Hardware Acceleration Needs: Meeting the throughput and latency demands of 5G with optimized hardware solutions.


Viettel High Tech leveraged Synopsys ASIP Designer™, a tool suite that automates and expedites the design of application-specific instruction-set processors (ASIPs), to streamline their 5G SoC development.

  • Quick Adaptation: ASIP Designer allowed for easy adaptation to new versions of 5G algorithms with minimal changes in architecture, size, and power consumption.
  • Compiler-in-the-Loop Design Flow: This feature saved months in multiple iterations of changes and optimization, enabling efficient profiling and modification of ASIP architecture.
  • Hardware-Software Co-Development: The ASIP cores provided a flexible environment to develop and validate 5G algorithms in parallel with the hardware platform at an early design stage.


The collaboration with Synopsys yielded significant benefits for Viettel High Tech:

  • Accelerated Design Process: ASIP Designer sped up the design of Viettel’s first 5G digital front-end SoC, saving valuable time.
  • Enhanced Performance: The tool’s instruction-level and data-level parallelism, along with easy addition of special instructions, boosted ASIP performance.
  • Efficient Verification: The on-chip debug environment and supporting tools made the verification process more efficient and less time-consuming.
  • Strategic Advancement: Viettel High Tech is advancing 5G communication in Vietnam, contributing to the creation of a digital society with super-fast, reliable connectivity.

By utilizing Synopsys' ASIP Designer and other design and verification tools, Viettel High Tech is not only advancing 5G technology but also positioning itself as a key player in the international semiconductor design chain.