Custom Design Platform Articles

The Synopsys Custom Design Platform includes breakthrough technologies in simulation, reliability analysis, analog design closure, layout automation and signoff. Below are articles and blogs which highlight applications, innovations, uses and key technologies that make the Synopsys Custom Design Platform the most productive analog design solution in the market. 

3nm advanced node designs

Article: Impact Of GAA Transistors At 3/2nm

The chip industry is poised for another change in transistor structure as gate-all-around (GAA) FETs replace finFETs at 3nm and below, creating a new set of challenges for design teams that will need to be fully understood and addressed.

Custom Chip Design

Blog: How to Radically Improve Analog Layout Efficiency with Highly Reusable User-Defined Devices

With increasingly tougher analog design deliveries, now it is the perfect time to take PCells’ power to another level by unleashing fresh wave of innovation, new methodologies and workflows, with Custom Compiler™ User-Defined Device (UDD). Learn what is UDD and why is it needed?

Custom Chip Design

Newsletter: The Accelerated Momentum Behind Customers’ Adoption of Synopsys Custom Design Platform

What’s driving the momentum behind customers’ adoption of a more modern solution for analog and mixed-signal design? Learn about various analog/mixed-signal design challenges, considerations and technologies that deliver faster layout and design closure. Learn how Synopsys provides designers an accelerated path to meet their design requirements and time-to-market targets.

White Paper: Machine Learning - Everywhere: Enabling Self-Optimizing Design Platforms for Better End-to-End Results

Machine-learning offers opportunities to enable self-optimizing design tools. Very much like self-driving cars that observe real-world interactions to improve their responses in different (local) driving conditions, AI-enhanced tools are able to learn and improve in (local) design environments after deployment.

Analog Design Needs To Change

It’s an exciting time to be involved in analog design! Innovation in analog design methodology has been flourishing with the introduction of new tools and improved methodologies. And this innovation is badly needed; analog design is getting tougher. Design schedules remain tight, and the technical challenges analog designers face continue to grow – especially when moving to advanced node technologies.

New Parasitic Extraction Requirements in Custom Design

Markets like 5G, biotechnology, AI, and automotive come with new challenges to parasitic extraction and closure. This article discusses the new parasitic extraction requirements in custom design for next generation SoCs.