Robustness Analysis is the process of analyzing a design’s performance in the presence of variation effects such as voltage, process, and temperature. It provides additional statistical metrics to measure the performance complimenting Static Timing Analysis and enables chip’s immunity to variation and drives PPA improvements by addressing pessimistic design constraints.

How Does Robustness Analysis Work?

Robustness analysis works by computing statistical metrics that measure the failure of a design/path/cell’s performance in the presence of variation. Variation analysis models' correlation among paths to improve robustness for local variations

In the case of voltage analysis, the tool sweeps the voltage at the instance in the path to compute voltage at which path will have 0 slack. The delta in the voltage for 0 slack and nominal operating voltage defines the voltage sensitivity of the path

Benefits of Robustness Analysis

Robustness analysis helps designers improve a chip’s immunity to variation and further boost performance and improve IR reliability and the benefit derived can be optimized depending on the design/application. For example, designs/chips that are classified as HPC, robustness analysis can help boost performance by addressing over-design/pessimism, while a low-power design, can benefit from the power savings and improved IR reliability. Applications requiring high-sigma signoff, such as high-yield chips or safety critical applications (ex: automotive, medical), can benefit from the improved robustness and reduced pessimism at higher-sigma level.

Robustness analysis delivers value by:  

  • Determines the probability of failure of design in the presence of variation parameters
  • Enables the identification of weak/bottleneck cells impacting design’s robustness and improves immunity through ECO
  • Enables Fmax boost of the design by minimizing the margin pessimism
  • Improves the voltage robustness of the design by identifying & optimizing IR sensitive cells 

Robustness Analysis and Synopsys

Synopsys’s PrimeShield™ solution provides design robustness analysis and optimization at advanced nodes and enables designers to effectively improve design robustness in face of escalating process and voltage variability. It enables designers to reduce design power and boost frequency by minimizing over-pessimism, over-margin and over-design while ensuring design safety. 

PrimeShield can rapidly identify and drive optimization of bottlenecks at the stage, path and design level that are sensitive to variations such as supply voltage drops or manufacturing variability. The patented fast statistical methods and breakthrough machine learning technology are used to firmly establish design robustness analysis as a method to minimize failure and maximize power, performance, and area (PPA).  PrimeShield delivers 100X-10,000X faster design robustness analysis and optimization than existing solutions. It is scalable to volume production system- on-chips (SoCs) with billions of transistors, while using industry standard inputs for immediate deployment.

Continue Reading