ARC processors are widely used in flash storage controllers. They offer the highest performance-efficiency with a broad range of processor performance and capability. They support easy customization and the addition of proprietary hardware through APEX custom instructions. ARC processors reduce system latency and power consumption, and offer best in class code density, which is very important in many storage controller designs.
The ARC HS family is the highest performance ARC processors delivering as much as 7500 DMIPS per core in 16nm processes. The HS family offers single-, dual-, and quad-core configurations with L1 cache coherency and L2 cache, a 40-bit physical address space, and support for Linux and SMP Linux. The HS family was designed with heavy consultation with our storage customers and has features like 64-bit per clock loads and stores that accelerate data movement.
The ARC EM family has the same programmer’s model and instruction set as HS cores making it easier for designers to use both cores in a design, and for the firmware team to partition their code across the processors. The family is designed for low power and small size and offers a broad range of capabilities while consuming as little as 2 µW/MHz power and taking less than one hundredth of a square millimeter of silicon. Even so, the ARC EM cores offer excellent performance delivering up to 1.8 DMIPS/MHz.
All ARC HS and EM cores support APEX custom instruction extensions that enable users to add their own proprietary hardware to the processor to increase performance, reduce power consumption or add functionality. Synopsys offers cryptographic options for the EM cores that include common crypto algorithms. These are area optimized and offer high-performance for storage applications that require encryption.
The ARC EV processors offer a fully programmable and scalable solution for AI. They are implemented with a high-performance scalar core coupled with a 512-bit wide vector DSP. A broad range of machine learning algorithms and software models can be programmed and supported by the EV family processors. They are available in single-, dual-, and quad-core implementations supporting extremely high levels of machine learning performance. If implementation of object detection and classification is desired in the drive, an optional Convolution Neural Network (CNN) engine supports HD video streams.
Synopsys offers a complete development environment for the ARC processors. This includes the MetaWare Development Toolkit with compiler, debugger, and simulator optimized specifically for ARC processors. There are also several other simulators that support fast simulation and cycle accurate simulation. There are many development boards available as well as support for the Linux and MQX operating systems.