As designers conceptualize and build the technology for the future of human-machine interfaces, they are relying on embedded microprocessors that deliver levels of performance that were unthinkable just a few years ago and at surprisingly low levels of power consumption. In the past it was possible to just crank up the clock speed to get more performance, but realistically we have reached a limit of 2 GHz – 3 GHz, so new designs are being developed with multiple processors to achieve the required performance. However, simply increasing the number of processors to meet application processing requirements is limited by power consumption and area restrictions. Fundamentally, the ideal processors will be designed to maximize performance while minimizing power consumption, memory requirements and system resources. The days of throwing transistors at the problem to get higher performance are past. Performance efficiency is a key design metric for designers paying attention to energy per cycle and mW per mm2, and not just performance.
To accomplish this, processors for human-machine interfaces will need provide higher processing performance without exceeding power budgets. Synopsys’ DesignWare® ARC® HS Processor Family, designed for high-end embedded applications with performance efficiency as a primary design metric, offers 2.5 GHz performance on 16-nm process, delivering more than 5200 DMIPS per core, using less than 50 mW of power. This is more than twice the performance and lower power consumption levels of other processors in this class; in some cases the processor can deliver more performance with less than half the power consumption of comparable processors.
To address the needs of today’s most innovative products, the ARC HS processors are available in dual-core and quad-core versions that support very high performance with symmetric or distributed processing. To enable additional design optimization, the processors are configurable so that each instance on a system-on-chip (SoC) can be tailored to the specific performance, power and area requirements of the application. Designers can also add their own custom instructions to the processor through the ARC Processor EXtension (APEX) interface to further increase performance, lower power consumption, or to add differentiating features to their design.