DesignWare IP for Wireless Combination Designs


A separated wireless combination/companion device offloads the application processor and provides mobile devices with connectivity to WiFi, Bluetooth, NFC, GPS, FM Radio. It may also include Ethernet, USB, or a 4G/LTE modem if they are desired and not present elsewhere in the system. A wireless combination / companion chip may also provide services to non-mobile devices such as televisions, set-top boxes, and automotive entertainment systems. 

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Wireless Combination Chips Diagram

Wireless Companion Designs

High-performance, silicon-proven, low-power IP from Synopsys can help to accelerate design cycles for wireless combination / wireless companion designs. 


Synopsys provides a range of DesignWare IP that helps address design requirements of wireless combination designs including the following:

  • Multi-lane, multi-geared interfaces for MIPI D-PHY and MIPI M-PHY operating up to 5.8Gbps with very low mw/GHz that provide the physical interface for power-optimized, high-speed inter-chip communication between the wireless combo/companion chip and the application processor
  • USB 3.0 SuperSpeed Inter-Chip (SSIC) protocol that use the MIPI M-PHY physical layer for layer for data transfer between the wireless combo/companion chip and the application processor
  • Analog-to-digital and digital-to-analog data converters interface to analog chips and RFICs
  • Low latency, low-power DDR/LPDDRn memory controllers and PHYs
  • Ethernet controllers and PHYs for cabled networking, if desired
  • USB 3.0 and USB 2.0 controllers and PHYs enable fast synching and data transfer from mobile devices to host computers and storage
  • Embedded memories and logic libraries enable designers to achieve the maximum performance with the lowest possible power consumption for specific application requirements