Designing deep submicron, multimillion gate ASICs for radiation sensitive environments requires a new approach to the traditional ASIC model. A collaboration between Honeywell and Synopsys combines advanced electronic design automation (EDA) tools and infrastructure with state-of-the-art silicon-on-insulator (SOI) manufacturing to address the requirements of next-generation military and aerospace chips.
To learn more about the challenges and solutions for implementing radiation-tolerant and radiation-hardened ASICs in deep-submicron technologies, download the white paper "Implementing Next-Generation Radiation-Hardened ASICs". Honeywell and Synopsys are pleased to make this paper available to their customers and prospective customers, free of charge. Please take a few minutes to complete the following questions and press "submit" to obtain a PDF version of this white paper. Click here to view outline.