The physical implementation of very deep sub-micron (VDSM) designs benefits from good, up-front planning strategies, both in terms of schedule as well as quality of results. While the optimal planning strategy often varies from one design to the next, there are guidelines that can prove valuable in this critical phase of the design process.
Developed by Synopsys Professional Services, based on tapeout-proven approaches, this white paper offers practical solutions for floorplanning and power planning as well as design practices for multi-voltage chip designs. Synopsys is pleased to make available to its customers and prospective customers a paper that addresses these and other challenges, free of charge. Click here to view an outline of the paper.