Achieve Fewer Patterns, Higher Coverage and Reduced TAT with​

Synopsys™ (Test Space Optimization AI) is the industry’s first autonomous artificial intelligence (AI) application for semiconductor test to minimize test cost and time-to-market for today's complex designs. automatically searches for an optimal solution in a large test search space to minimize pattern count and ATPG turn-around time reducing test costs dramatically. By leveraging the power of AI, provides automation, scalability, and expert level productivity to deliver results beyond what is possible with manual efforts.

Key Benefits

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Fewer Patterns

Automate ATPG parameter tuning  for Optimal QoR​

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Faster Turn Around Time

Accelerate turnaround time with intelligent parameter convergence​

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Higher Productivity

Enable expert level productivity and scalability​


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AI-Powered ATPG

Standard ATPG requires setting many tool parameters and options and as a result, greater expertise is required to operate the tool efficiently and produce optimal results in the shortest time possible. addresses these challenges by using an AI-powered optimization engine to intelligently automate the ATPG parameter tuning and achieve design-specific QOR optimization consistently.​ graph

Faster Results

Traditional methods of optimizing ATPG QoR are iterative and time-consuming due to a large search space created by multiple settings, complex relationship with test metrics, user targets and design characteristics. offers a highly efficient solution by learning the correlation between these factors and continuously reducing the search space to reach the optimal result. achieves target test coverage while producing the fewest number of test patterns or cycles and eliminating iterations to accelerate time-to-results for any design.

What Our Customers Are Saying

Achieving the highest quality silicon is essential given our increasingly complex chips that power many of the world’s devices. We must constantly improve methodologies and deploy new technologies to quickly deliver test programs that provide high defect coverage while minimizing testing cost. AI-driven enhancements for automatic test pattern generation are critical to achieving our future silicon testing goals."

Xian Lu


Director, MediaTek

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