Achronix Semiconductor Corporation, headquartered in Santa Clara, California, is a fabless semiconductor company specializing in high-end FPGA-based data acceleration solutions. They cater to industries requiring high-performance, compute-intensive, and real-time processing applications. Achronix stands out as the only supplier offering both high-performance standalone FPGAs and licensed eFPGA IP solutions. Their flagship products, Speedster®7t FPGAs and Speedcore™ eFPGA IP, are further enhanced by VectorPath™ accelerator cards, targeting AI, machine learning, networking, and data center applications. Additionally, Achronix provides comprehensive support through the Achronix Tool Suite, enabling customers to develop custom applications efficiently.

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Achronix faced several critical challenges that needed prompt and effective solutions to ensure the success of their high-performance FPGA products.
  • High-Performance FPGAs on a 7nm Process: Achronix needed to design and deliver high-performance FPGAs on a 7nm process to keep pace with the rapidly evolving AI/ML, telecom, and data center markets.
  • Design Optimization: The company faced the challenge of reducing design risks while optimizing FPGAs for power, performance, and area (PPA).
  • Time-to-Market Pressure: Meeting critical time-to-market objectives was crucial, especially with the added complexities of assembling a new team, utilizing a new process node, and integrating cutting-edge interfaces.


To tackle these challenges, Achronix collaborated with Synopsys and implemented the DesignWare Foundation and Interface IP suite. This comprehensive solution included embedded memories, logic libraries, temperature sensors, PCIe 5.0 IP, and DDR4 PHY and controller IP.

  • Foundation IP: The DesignWare Logic Libraries provided significant PPA (power, performance, and area) advantages over competitors, offering a wide variety of cell sizing options. The memory compilers were user-friendly and allowed Achronix to create over 90 unique macros/configurations efficiently.
  • Interface IP: The DDR4 Controller and PHY IP were easy to integrate and provided extensive RAS capabilities. The PCIe 5.0 IP featured low latency, high bandwidth, and strong design-for-debug capabilities, essential for Achronix’s high-performance FPGAs.
  • Technical Support: Synopsys’ knowledgeable and responsive technical support team played a crucial role in accelerating project schedules and optimizing designs, especially as Achronix onboarded new team members.


The implementation of Synopsys DesignWare IP led to significant improvements for Achronix:

  • Accelerated Time-to-Market: Achronix achieved a two to three-month reduction in time-to-market, crucial for staying ahead in fast-evolving markets.
  • Enhanced PPA: The superior quality of PCIe and DDR IP resulted in low latency, high bandwidth, and improved area efficiency. Specifically, the DesignWare Logic Libraries provided an 8% improvement in timing.
  • Cost Efficiency: By leveraging Synopsys IP, Achronix avoided the high costs and time associated with in-house IP development.
  • Future Projects: The successful integration and performance of the DesignWare IP have led Achronix to consider Synopsys for future projects, including the adoption of DDR5 IP.

Overall, the collaboration between Achronix and Synopsys not only addressed immediate technical challenges but also laid a strong foundation for future innovations and market success.