IoT devices are defined by their ability to take in or “sense” real world signals, perform operations on the associated data and communicate results over a network, whether it is the internet or local network. Most general-purpose RISC processors can process the signals successfully, but dedicated DSPs can perform these tasks with better power efficiency and lower latency. On the other hand, RISC processors are well suited for transferring data and setting up communication channels. Using separate independent processors is an option but adds cost and board space to the system as well as multiple development and debug environments and tools. This complexity and cost can be reduced using a single processor core with both functions.
Key features such as voice triggering, voice control, speech playback, and inertial sensor processing, which are needed in always-on and low-power environments, leverage DSP instructions to perform tasks such as filtering, Fast Fourier Transform (FFT), and interpolation while still meeting energy goals.
The DesignWare® ARC® EMxD family of processors meets these challenges by adding a DSP engine with ARCv2DSP instruction set architecture (ISA) to ARC configurable processor cores, enabling RISC and digital signal processing within a single unified architecture (Figure 1). They offer low power consumption and can perform speech detection for voice control in less than 1 µW.
The ARC EM DSP processors are highly configurable so that each instance can be tailored to achieve the optimum balance of DSP and RISC performance for the target application as well as power- and area-efficiency. For example, the ARC EM5D and EM7D are well suited for applications requiring around 50% DSP processing and the EM9D and EM11D, with support for XY memory, are ideal for more DSP intensive applications. ARC Processor EXtension (APEX) technology also offers designers the ability to create user-defined instructions, enabling the integration of custom hardware accelerators that improve application-specific performance while reducing energy consumption and the amount of memory required.