Eamonn Quigley (Arm) spoke about the verification challenge of complex IC development and how the Synopsys HAPS FPGA-based prototyping solution is a fundamental piece of the verification strategy for all Arm IP products. Amol Bhinge (NXP) shared his insights on the exploding complexity of verification challenges, which remain in the critical path of time to market.
- Silicon Design & Verification
- Products
- Solutions
- Resources
- Services
- Community
- Training
- Silicon IP
- Products
- Markets
- Newsletter
- Customer Success
- News
- Resources
- Company
- About Us
- Investor Relations
- Community
- Newsroom
- Resources
- Careers
< Silicon Design & Verification
Silicon Design & Verification
< Products
< Products
< Products
< Products
< Products
< Products
< Products
Photonic Solutions
PIC Design Suite
< Silicon Design & Verification
< Solutions
< Solutions
< Solutions
Cloud
Synopsys on the Cloud
< Solutions
< Silicon Design & Verification
< Resources
< Resources
Verification
Articles
Blogs
Datasheets
Events
News
Newsletters
Success Stories
Videos
Webinars
White Papers
< Resources
< Silicon Design & Verification
< Services
< Services
< Services
< Silicon Design & Verification
< Community
Community
Community Overview
< Community
< Community
< Community
< Community
< Silicon Design & Verification
< Training
< Silicon Design & Verification
Training
Training and Education
< main menu
< Silicon IP
Silicon IP
< Products
< Products
Processor Solutions
ARC Processor IP
Embedded Vision Processor IP
Development Tools
Operating Systems
Ecosystem
ASIP Tools
< Products
Memories & Libraries
Logic Libraries
Memory Compliers
Duet Packages
HPC Design Kit
Embedded Test & Repair
Non-Volatile Memory
< Products
< Products
Analog IP
Data Converters
< Products
< Products
< Products
< Silicon IP
< Markets
< Silicon IP
Newsletter
< Silicon IP
Customer Success
< Silicon IP
News
< Resources
< Resources
< main menu
< Software Integrity
Polaris Platform
Comprehensive application security from developer to deployment
< Software Integrity
< Software Integrity
< Software Integrity
Professional Services
Strategy and programs that address security before, during and after development
< Software Integrity
< Tools
< Tools
< Tools
< Tools
< Software Integrity
< Services
Managed Security Testing
Managed SAST
Dynamic Analysis (DAST)
Penetration Testing
Mobile Application Security Testing
Network Security Testing
< Services
Professional Services
Strategy and Planning (BSIMM)
Architecture & Design
DevSecOps Integration
Cloud Security
Industry Solutions
< Services
Open Source Audits
< Software Integrity
< Training
< Training
Product Education
< Training
Community
< Software Integrity
< Solutions
< Solutions
< Resources
< Resources
< Software Integrity
< Software Integrity
Customers
< Partners
< Partners
Become a partner
< Software Integrity
< Software Integrity
Blog
< main menu
< About Us
Company
< About Us
< About Us
About Us
About Us
< Investor Relations
< About Us
Investor Relations
Investor Relations
< Community
< About Us
Community
Community
< Newsroom
< About Us
Newsroom
Newsroom
< Resources
< About Us
Resources
Resources
< Careers
< About Us
Careers
Careers
< main menu
DVCon 2019 Verification Lunch Panel
Industry Leaders
Verify with Synopsys
On February 28, 2019 Synopsys hosted a verification panel at DVCon. Ramesh Dewangan (Synopsys) delivered an update on the next wave of verification innovation in Synopsys’ Verification Continuum Platform, highlighting new solutions for ZeBu Server 4, HAPS-80 Desktop Prototyping, and VC Formal Regression Mode Accelerator App.
Speakers
Ramesh Dewangan
Synopsys Verification Update
Senior Director of Marketing, Verification Group, Synopsys
Eamonn Quigley
FPGA-based Accelerated IP Verification at Arm
FPGA Engineering Manager, Arm
Amol Bhinge
Design Verification: Networking and Automotive
R&D Emulation and Verification Hardware Director, NXP
