HAPS®-Developer eXpress (HAPS-DX) Prototypes

Prototypes Ideal for Prototyping ASIC Blocks and IP

The Synopsys HAPS Developer eXpress (HAPS-DX) provides best of class prototyping hardware and automation software tools, ProtoCompiler DX, in a package that is focused on rapid bring-up and accelerating the availability of ASIC RTL block and IP prototypes for design teams who need state-of-the-art prototyping solutions. HAPS-DX uses Xilinx Virtex®-7 FPGAs for capacity up to 6 million ASIC gates with a flexible I/O interface architecture to support both Synopsys HapsTrak 3 and industry standard FPGA Mezzanine Card (FMC) formats for real-world connections.

With development cycles shrinking and software content growing, the demand for software-driven, in-context validation of new ASIC blocks and IP requires that physical prototypes be delivered as fast as possible. To accelerate prototype assembly after each ASIC RTL source code "drop" - integrated software tools for FPGA logic synthesis, design debug, and prototype bring-up help reduce the time necessary to execute validation scenarios and conduct software integration tasks within days or weeks rather than months. 


  • Supports ANSI standard FMC and Synopsys HapsTrak 3 connectors for maximum I/O flexibility
  • Includes best of class ASIC source compilers and prototype logic synthesis for fast prototype bring-up
  • Provides simulator-like observability into prototype operation with gigabyte capacity trace waveform storage
  • Integrates Xilinx Virtex-7 FPGA, DDR3 memory, PCI Express end-point, and UMRBus for a flexible and programmable prototyping platform
  • Modular architecture and design flow integrates with high-capacity Synopsys HAPS-70 Series for full systems-on-chip validation and hardware/software integration scenarios
  • Compatible with HAPS ProtoCompiler for combined use of HAPS-DX/70/80 Series systems


Easy Bring-Up

HAPS-DX software, ProtoCompiler DX, accelerates availability of the prototype with prototype logic synthesis tailored for FPGA-based prototypes. Design compilers are compatible with popular HDL standards, ASIC HDL coding styles, and DesignWare IP. ASIC design constraint recognition of Synopsys Design Constraints (SDC) and Universal Power Format (UPF) speeds the migration of timing and power intent into the prototype. Fast compile modes reduce the review time of RTL source code and provides up to five times faster throughput than traditional FPGA synthesis tools. F

Learn about the HAPS-DX prototyping system, from Joachim Kunkel, Senior VP & GM of the Synopsys Solutions Group.

I/O interfaces compatible with both industry standard FPGA Mezzanine Card (FMC) and HAPS HapsTrak 3 formats provide designers with a wide selection of daughter boards which helps to minimize the effort to assemble prototypes that connect to real-world interfaces.

HAPS Daughter Boards

Non-Intrusive and High-Capacity Debug

High speed debug and high-capacity storage options like HAPS Deep Trace Debug with up to 4 GBytes of storage and Synopsys Verdi integration provides a simulator-like debug environment for the prototype with the capacity to store full seconds of waveforms for easier protocol compliance checks or wide signal analysis.

Reuse and Integration with HAPS-80

HAPS-DX compatibility with HAPS-80 systems expands the prototype capacity to make full SoC validation feasible. Reuse of design blocks and HAPS-DX hardware avoids lengthy re-compile and place-and-route cycles. HAPS-DX based on Xilinx Virtex-7 devices provides up to four million ASIC gates of capacity with Configurable Logic Block (CLBs), RAM, and DSP resources ideal for ASIC block module and IP validation. High-performance I/O and embedded PCI Express support up to x8 Gen 2 and other popular communication protocols.

Flexible Prototype Connectivity Options

HAPS-DX enables early software development by allowing the combination of virtual and FPGA-based prototypes. HAPS-DX's integrated Synopsys Universal Multi-Resource Bus (UMRBus) interface and optional AMBA transactors provide a seamless connection between a HAPS-DX system and the Virtual Development Kits (VDKs) generated by Synopsys Virtualizer™ to create an integrated hybrid prototyping environment.

Hybrid Prototyping Solution video