HAPS-DX software, ProtoCompiler DX, accelerates availability of the prototype with prototype logic synthesis tailored for FPGA-based prototypes. Design compilers are compatible with popular HDL standards, ASIC HDL coding styles, and DesignWare IP. ASIC design constraint recognition of Synopsys Design Constraints (SDC) and Universal Power Format (UPF) speeds the migration of timing and power intent into the prototype. Fast compile modes reduce the review time of RTL and provides up to five times faster throughput than traditional FPGA synthesis tools. Fast bring-up options like HAPS clock optimization allow even the most complex ASIC clocking schemes to be implemented quickly in clock-limited FPGA architectures.
Learn about HAPS-DX FPGA-based prototyping system, from Joachim Kunkel, Senior VP & GM of the Synopsys Solutions Group.
I/O interfaces compatible with both industry standard FPGA Mezzanine Card (FMC) and HAPS HapsTrak 3 formats provide designers with a wide selection of daughter boards which helps to minimize the effort to assemble prototypes that connect to real-world interfaces.
HAPS Daughter Boards
VITA's FMC Website
Non-Intrusive and High-Capacity Debug
RTL debug and high-capacity storage options like HAPS Deep Trace Debug with up to 4 GBytes of storage and Synopsys Verdi integration provides a simulator-like debug interface for the prototype with the capacity to store full seconds of signal trace data for easier protocol compliance checks or wide signal visibility.
Reuse and Integration with HAPS-70
HAPS-DX compatibility with HAPS-70 Series systems expands the prototype capacity to make full SoC validation feasible. Reuse of design blocks and HAPS-DX hardware avoids lengthy re-compile and place-and-route cycles. HAPS-DX based on Xilinx Virtex-7 devices provides up to four million ASIC gates of capacity with Configurable Logic Block (CLBs), RAM, and DSP resources ideal for ASIC block module and IP validation. High-performance I/O and embedded PCI Express support up to x8 Gen 2 and other popular communication protocols.
Flexible Prototype Connectivity Options
HAPS-DX enables early software development by allowing the combination of virtual and FPGA-based prototypes. HAPS-DX's integrated Synopsys Universal Multi-Resource Bus (UMRBus) interface and optional AMBA transactors provide a seamless connection between a HAPS-DX system and the Virtual Development Kits (VDKs) generated by Synopsys Virtualizer™ to create an integrated hybrid prototyping environment.
Hybrid Prototyping Solution video