Tools for 3rd Party FPGA Prototyping Boards

FPGA-based prototyping is growing in popularity as it allows ASIC design teams to meet their development schedules for hardware and software enabling the longest time in market.

Synopsys' FPGA-based prototyping solution improves time-to-market and helps avoid costly device re-spins by enabling early embedded software development and allowing hardware and software co-design well ahead of chip fabrication. Together, our suites of tightly integrated and easy-to-use HAPS hardware and ProtoCompiler dramatically accelerate software development, hardware/software integration and system validation from individual IP blocks to processor subsystems to complete SoCs.

In addition to the fully integrated FPGA-based prototyping solution based on HAPS hardware and ProtoCompiler, Synopsys also provides a suite of tools for FPGA-based prototypers building their own boards.

  • Synplify – Provides fastest time to initial hardware and turn-around time, highest timing QoR with smallest area and integration with DesignWare® IP and VCS® simulation
Tools for FPGA Prototyping Diagram

Synplify provides ASIC and SoC designers with several features that help accelerate development of a semiconductor prototype. One of the first challenges faced by designers is the replacement of non-FPGA-based portions of the designs, such as memories, clock configurations and ASIC test circuitry. Synplify provides an easy methodology for handling side files in addition to parsing multiple language formats and constraints files. The next challenge is the importing and handling of 3rd party, Synopsys and internally developed IP, which Synplify automates to significantly increase productivity. Finally, Synplify automates clock conversion so that an ASIC design can fit into the clock structures of an FPGA.