Design Automation for Radiation Tolerant FPGAs: A Discussion with Ken O’Neill

Ian Land

Sep 28, 2022 / 5 min read

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Ken O’Neill Portrait

Design Automation for Radiation Tolerant FPGAs

We sat down with Ken O’Neill, Director of Space and Aviation Marketing at Microchip’s FPGA business unit, to learn how the Synopsys Synplify and verification tools complement Radiation-tolerant Designs with Microchip Radiation-Tolerant FPGAs.

Q: Welcome Ken. How long have Microchip and Synopsys been working together regarding FPGAs for Space Applications?

Synopsys has worked with Microchip, and previously Microsemi and Actel, for over 20 years, since the early days of space FPGAs. Over the years we have supported at least ten generations of space-grade FPGAs, going back as far as the 2.0um process node. Today, we have in production five generations of space-qualified FPGAs in addition to at least seven generations of commercial FPGAs that leverage Libero SoC Design Suite which includes Synplify RTL Synthesis.  In addition, the Microsemi FPGA product families, are also supported by a robust verification flow from Synopsys.

Microchip RT + Synopsys Synplify

Figure 1 – Microchip RT + Synopsys Synplify

Q: What are the challenges of making semiconductor devices work in space applications?

There are many challenges for semiconductors in space:

  • Shock and vibration from launch, booster stage separation, and satellite deployment
  • Radiation – cumulative and single event effects
  • Temperature extremes and frequent temperature cycling
  • Power consumption and heat dissipation – since cooling requires radiation into space
  • Reliability assurance and qualification

Since we don’t have time to go into depth on these topics in this interview, let’s focus on radiation and power consumption. All microelectronic devices including Microchip RT FPGAs are subject to substantial radiation effects when in space, including protons, heavy ions and gamma rays, the devices are subject to random faults and charge accumulation. This is orbit dependent and varies from low-earth orbit to deep space and planetary applications. Microchip Libero SoC Design Suite accelerates space designs which includes utilizing Synplify’s automated methods to mitigate faults that occur from space radiation supporting all Microchip FPGAs, including the RT family devices.

Q: How do Microchip RT FPGAs meet these challenges?

Our radiation tolerant FPGAs have always had immunity to radiation-induced upsets to their configuration, due to the programming technologies that we use. That remains true today, with our latest RT families such as the RTG4 and RT PolarFire FPGAs remaining invulnerable to configuration upsets, which means designers don’t have to worry about scrubbing and reloading the FPGA configuration, which ultimately is a saving in power consumption, bill of materials cost, and board space.

As I noted earlier, power is a big deal in space. Satellite electronics are limited to the power available from the solar panels, which tend to degrade with time and exposure to radiation. An even bigger problem is what do you do with excess heat generated in satellite electronics. You can’t have cooling fans in satellite electronics since they operate in a vacuum, so the only way to get rid of heat is to conduct it away and radiate it into space. Components which generate a lot of heat cause thermal management problems which are expensive to solve. The programming technology we use in our FPGAs gives us intrinsically low static power, which really helps system designers manage the thermal issues in space craft. In addition, our latest RT PolarFire FPGAs have very efficient serial transceivers which have best-in-class power/performance characteristics. This helps with thermal management in signal processing applications which rely on serial data transmission from data converter to FPGA and from FPGA to backplane.

Diagram FPGA Block

Figure 2 – FPGA block diagram

The final piece of the puzzle is qualification. We’ve qualified many families of RT FPGAs to QML standards, defined by MIL-PRF-38535. Our RTG4 RT FPGAs are the latest to achieve QML class V qualification.

Q: How does Synopsys complement the RT-family products?

Synopsys has automated synthesis mechanisms within Synplify to detect and avoid random faults, including support of redundancy and determination of critical design regions for radiation tolerance. Some of the automated mechanisms are triple modular redundancy for memory, I/O and logic, safe state machines, and memory error correction coding.

Beyond our Libero SoC Design Suite, mission-critical customers often work with Synopsys who also offers verification and fault injection capabilities that observe and reduce faults, simulate and emulate faults, and support automated debug.

Q: Can you provide a couple of example applications and how the joint solution benefits customers?

Sure. Our latest radiation tolerant family, the RT PolarFire FPGAs, uses the same logic fabric as the commercial PolarFire FPGAs. This means that unlike many of our previous space qualified FPGAs, there is no built-in triple module redundancy in the logic elements. RT PolarFire FPGAs are high-density, high-performance devices that are intended for high-speed data processing, where a single bit upset every couple of weeks amongst a torrent of data that’s running at tens of gigabits per second is likely to be of no consequence.

FPGA Block diagram with configuration

Figure 2a – FPGA block diagram with configuration and control added

However, every data processing device has at least some circuitry where a much higher level of protection against radiation effects is needed – for example, a configuration circuit or a command and control function. Synplify works well in this situation because it lets you apply TMR selectively to the parts of the FPGA design where it is needed, without causing a performance and utilization penalty to the parts of the design that don’t need it.

The power consumption of RT PolarFire FPGAs is also best-in-class, and the selective TMR capability of Synplify helps designers keep power consumption and thermal effects under control, again by applying TMR where it is needed.

So, with Synplify’s selective TMR capability, you can have your RT PolarFire FPGA hosting a large data processing design running efficiently at full speed, with a small fraction of the FPGA running a TMR-protected command and control function.

Q: How does this benefit commercial space customers?

The emerging commercial market has similar challenges to government space systems, but they need to meet different cost and volume points. The multiple Microchip FPGAs and design tools combined with the automated tool capability from Synopsys makes it manageable for a customer to support a range of cost and application needs.

Q: Thank you Ken for joining us for this insightful discussion. Any closing remarks?

You are welcome! Microchip and Synopsys are very excited to offer our joint Aerospace and Defense customers with state-of-the-art tools from Synopsys that complement Microchip’s leading Radiation-tolerant FPGAs. With this combination, we will help our customers usher in a new era of innovation not only with government-sponsored space systems, but also commercial satellites and space travel.

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