Every IoT device needs memory, and one commonly used memory is high-density single-port SRAM. Typically the code is read, brought out of the Flash memory, and loaded into the SRAM while the processor runs out of the SRAM, maintains state and is able to run from the large amount of storage.
IoT designs also require high-density single-port register files. These memories are typically smaller than high-density single-port SRAM. Ultra-low leakage viaROM can be used for small IoT edge devices to store boot code that gets most of its program out of Flash. However, most of the major subroutines and drivers can be embedded into the ROM, and it's much more efficient for storage than Flash or even SRAM. Using an ultra-low leakage viaROM and source biasing in the SRAM can reduce leakage by up to 70 percent while maintaining data.
Power management for memories in IoT applications is critical. Designers can use deep sleep modes and long channel devices to reduce leakage. In addition, ultra-low voltage operation using read and write assist circuitry in 40nm memory dramatically reduces dynamic power dissipation.
Ultra-low-power ROMs provide a shutdown mode for maximum leakage reduction by turning off power to the array when it is not being read. This results in cutting leakage to practically zero. Memories tend to be a large portion of the SoC, so the ability to zero out the leakage associated with the memory saves a huge amount of battery life.