Wear leveling and ECC requirements for an SSD controller can be met with RISC processors that offer flexibility in implementation as well as application-specific customization options to maximize performance while minimizing power. GPPs used with HDDs do not offer customization because they lack the specialized data paths and flexibility necessary to carry out efficient processing of some of the key algorithms in SSDs. A GPP does offer flexibility, but will likely fall short when high-demand mathematics come into play.
The hardwired solutions used with some HDDs are impractical for SSDs because they lack flexibility and are not easily adaptable to the range of platforms on which SSDs are used. Hardwired solutions also make it difficult to offer single chips that support a range of products and respond to rapidly changing market requirements.
The DSP solutions used with HDDs could potentially be used for SSDs, but the signal processing requirements are different with SSDs. DSPs offer mathematical computation flexibility but are not as efficient for embedded control.
To address these limitations, a flexible RISC processor and DSP could be used in the design, but this increases power consumption and cost, while negatively impacting design time. Two different processors require two different development tool flows, and tasks between the two processors must be synchronized in user software, adding a level of complexity. For balanced power consumption, cost, and time-to-market, SSDs can use a flexible, customizable RISC processor that offers high performance with some signal processing capability.