IP Accelerated: IP Integration with Less Effort, Lower Risk, and Faster Time-to-Market
By Johannes Stahl, Director of Product Marketing for Virtual Prototyping, Synopsys
With the increase in SoC hardware and software complexity, it’s no longer enough to provide just IP blocks. Both hardware engineers and software developers need more from their IP providers to help them meet their schedules. Hardware engineers need “known good” IP configurations that can be easily modified to explore design tradeoffs. Software developers need proven targets so that they can start work on software development, bring-up, debug, and test earlier in the product development process. Customized IP subsystems that fit right into the target SoCs can help to significantly reduce overall SoC development cost.
With the IP Accelerated initiative, Synopsys is delivering more than silicon-proven IP blocks, going beyond what is traditionally expected from IP suppliers. Synopsys is helping designers achieve successful IP integration with less effort, lower risk, and faster time-to-market with DesignWare® IP Prototyping Kits, DesignWare IP Virtual Development Kits, and customized IP subsystems, each of which accelerates prototyping, software development and integration of IP into SoCs (Figure 1).