Figure 3 shows the migration or evolution paths available with the ARC processors. We have discussed the movement between ARC EM, ARC HS, and ARC VPX DSP processors for picking the right point for signal processing algorithm computation. At the beginning of this article, we briefly mentioned the other dimension, NN computation. More and more computation algorithms are using NN / AI computation. The EM, HS, and VPX DSP processors support the embARC Machine Learning Inference (MLI) inference software library. This MLI library offers low level NN computation components optimized on Synopsys ARC DSP processors. TensorFlow Lite Micro framework is supported through the MLI library components, hence offers highly optimized performance for a wide range of graph porting. This allows Synopsys ARC DSP processors to execute NN algorithms and graph computation in software on the DSP.
The VPX DSP processor, even with its dual vector units, is not able to deliver the required performance for NN algorithm computation requirements in this case hardware acceleration with a NN hardware engine is needed. To address this, Synopsys offers the ARC EV7x processor, which provides a variety of NN hardware engine configurations from 440MACs to 14KMACs. A key point in the ability to evolve to the EV7x processor is that the vector DSP within the ARC EV processor is based on ARC VPX DSP processor. Hence the system architect using an ARC VPX processor can move to the EV processor very simply and benefit from the NN hardware engines for high-end AI algorithms.
There are many applications that would benefit from this option of moving from an ARC VPX to an ARC EV processor. For example, in RADAR and LiDAR sensor signal processing applications the detection of objects can be implemented on the NN hardware engines. In 5G communications, advanced MIMO algorithms will need NN level computation requiring hardware acceleration. In next-generation voice/speech recognition applications, speech recognition can be implemented on an ARC VPX DSP processor, with natural language processing running on the ARC EV processor.
All ARC processors are supported by the DesignWare ARC MetaWare Development Toolkit, a complete solution for developing, debugging, and optimizing embedded software targeted for ARC processors. For efficient algorithm development, the latest MetaWare tools include an enhanced C/C++ compiler, as well as support for auto-vectorization. The toolkit also includes a DSP software library of fixed-point math functions and an instruction-accurate simulator that includes accurate modeling of the new DSP operations.