The Ethernet QoS v4.0 controller IP supports all of the features in the existing Ethernet QoS controller IP and adds:

• Scalability with support for up to eight transmit AVB channels and eight receive AVB channels
• Separate FIFO memory and controllers for every Tx or Rx channels added with a new architecture allowing implementation in a single memory with programmable size for each queue
• New architecture for multi-channel DMA (up to eight channels) that interfaces with multiple queues with a single RAM FIFO
• TCP/IP segmentation offload features including
  • Stateless offloading
  • Max TCP packet payload segmented to 256 KB
  • Programmable maximum segment size (MSS) per packet
  • The same header as the parent TCP packet
  • Context descriptor sequence
  • Option for external TSO memory for TCP/IP headers
  • Checksum offloading engine (COE), which is essential for TSO

In addition, configuration options in the Ethernet QoS v4.0 controller IP include new data center bridging features. The initial release of the IP supports:

• Separate channels or queues for DCB data transfer in 100 Mbps and 1000 Mbps modes
• Up to eight queues on the Tx and Rx paths for DCB traffic
• Following IEEE 802.1-Qaz-2011 specified Enhanced Transmission Selection (ETS) algorithms for the Tx queues
• Following IEEE 802.1Qbb-2011 specified Priority-based Flow Control
• Common memory for all selected Tx or Rx queues. The system-side interface (AHB, AXI, or native) remains the same
• Programmable control to route received VLAN tagged non-AV packets to channels or queues

As in the first generation, the Ethernet QoS v4.0 controller IP supports all standard PHY interfaces, including:

• Gigabit Media Independent Interface (GMII)
• Media Independent Interface (MII)
• Reduced GMII (RGMII)
• Serial GMII (SGMII)
• Ten Bit Interface (TBI)
• Reduced MII (RMII)
• Serial MII (SMII)
• Reduced TBI (RTBI)
• Reverse MII (RevMII)

In addition to the new RTL design, Synopsys has expanded driver support options through a partnership with Vayavya Labs. Vayavya Labs was founded in 2006 with patented device driver generation technology and brings extensive domain expertise in embedded software design, development, and testing. With the Synopsys Ethernet QoS v4.0 controller IP, designers receive the base driver that provides the basic network driver tested on a Linux 3.0 system. This base driver includes a single DMA channel with ring mode descriptor support. Designers using Synopsys’ Ethernet QoS v4.0 controller IP can also license a comprehensive driver from Vayavya Labs that provides additional features:

• Multi-channel DMA
• VLAN tag detection (IEEE 802.1Q)
• Energy Efficient Ethernet (IEEE 802.3az-2010)
• TCP segmentation offloading
• Audio video bridging (IEEE 802.1Qav-2009 and IEEE 802.1AS-2011)
• Large receive offloading
• Jumbo frame handling
• Precision time protocol (IEEE 1588-2008)

Synopsys and Vayavya Labs jointly developed and validated this new comprehensive driver using a HAPS FPGA-based prototyping solution running the Ethernet QoS v4.0 RTL with the new software drivers using a Linux based system.

The DesignWare Ethernet digital IP is packaged as a .run file. Designers use the Synopsys coreConsultant tool to configure, synthesize, simulate, and verify the IP configuration. The Ethernet QoS v4.0 controller IP also includes:

• Configured Verilog RTL source code
• Verilog test suite that integrates the device-under-test (DUT) models
• Synopsys Ethernet Verification IP that can be reused in your Verilog, VHDL, or Vera Verification environment
• Synthesis scripts for Synopsys Design Compiler and Synplify Pro
• Regression scripts for Synopsys VCS, ModelSim, and NC-Verilog simulators
• Leda checker rules used for linting and example report
• Support for creating gate-level DUT models using a GTECH library

In summary, the DesignWare Ethernet QoS v4.0 controller IP is designed for today’s challenging Ethernet systems in multiple application spaces. It offers a smaller area for AVB and advanced features supporting TCP/IP offloading, memory management, and data center bridging. The new software driver partnership with Vayavya Labs enables Synopsys to continue to provide the best-in-class drivers that IP designers need for their applications. The IP is available today. For more information, please contact us.