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Finding Your Way Through Formal Verification
Formal Verification Book
Finding Your Way Through Formal Verification provides an introduction to formal verification methods. This book was written as a way to dip a toe in formal waters. You may be curious about formal verification, but you’re not yet sure it is right for your needs. Or you may need to plan and supervise formal verification activity as a part of a larger verification objective.
You don’t plan to run formal tools yourself but you know that effective management will require some understanding. In verification planning, you certainly need to know where formal can play a role and where it may not be suitable, what effort and expertise should be planned for in using these techniques (like most verification techniques, these generally aren’t push-button) and how you can assess effectiveness and coverage in what formal teams report back to you.
The authors of Finding Your Way Through Formal Verification are experts in using formal verification. This book serves as a foundation for how methods work, when and where to apply them and how formal verification is managed in the overall verification objective.
You can download a FREE, full eBook edition pdf in English and also purchase printed copies of the English edition through Amazon (ISBN-13: 978-1986274111).
About the Authors
Bernard Murphy - SemiWiki
Bernard is a part-time blogger and author with SemiWiki, serves on the board of Mother Lode Wildlife Care in the California Gold Country and admits that he’s never had so much fun. Earlier, he held down a real job as CTO at Atrenta. Earlier still, he held technical contributor, management, sales and marketing roles variously at Cadence, National Semiconductor, Fairchild and Harris Semiconductor. In his re-invention as a writer, Bernard has published over 300 blogs between SemiWiki and EETimes and has also released the book “SoC Emulation: Bursting into its prime”, co-authored with Mentor Graphics. He received his BA in Physics and D. Phil in Nuclear Physics from the University of Oxford.
Manish Pandey - Synopsys
Manish Pandey is a Fellow at Synopsys, and an Adjunct Professor at Carnegie Mellon University. He completed his PhD in Computer Science from Carnegie Mellon University and a B. Tech. in Computer Science from the Indian Institute of Technology Kharagpur. He currently leads the R&D teams for formal and static technologies, and machine learning at Synopsys. He previously led the development of several static and formal verification technologies at Verplex and Cadence which are in widespread use in the industry. Manish has been the recipient of the IEEE Transaction in CAD Outstanding Young author award and holds over two dozen patents and refereed publications.
Sean Safarpour - Synopsys
Sean Safarpour is the Director of Application Engineering at Synopsys, where his team of specialists support the development and deployment of products such as VC Formal, Hector and Assertion IPs. He works closely with customers and R&D to solve their current verification challenges as well as to define and realize the next generation of formal applications. Prior to Synopsys, Sean was Director of R&D at Atrenta focused on new technology, and VP of Engineering and CTO at Vennsa Technologies, a start-up focused on automated root-cause analysis using formal techniques. Sean received his PhD from the University of Toronto where he completed his thesis entitled “Formal Methods in Automated Design Debugging”.
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