Cloud native EDA tools & pre-optimized hardware platforms
You don’t plan to run formal tools yourself but you know that effective management will require some understanding. In verification planning, you certainly need to know where formal can play a role and where it may not be suitable, what effort and expertise should be planned for in using these techniques (like most verification techniques, these generally aren’t push-button) and how you can assess effectiveness and coverage in what formal teams report back to you.
The authors of Finding Your Way Through Formal Verification are experts in using formal verification. This book serves as a foundation for how methods work, when and where to apply them and how formal verification is managed in the overall verification objective.
You can download a FREE, full eBook edition pdf in English and also purchase printed copies of the English edition through Amazon (ISBN-13: 978-1986274111).
Bernard Murphy - SemiWiki
Bernard Murphy is a part-time blogger and author with SemiWiki, author of “The Tell-Tale Entrepreneur” and a co-author of the first edition of this book. He is also a content marketing advisor and serves on the board of Mother Lode Wildlife Care in the California Gold Country. Earlier he was CTO at Atrenta and has held technical contributor, management, sales and marketing roles variously at Cadence, National Semiconductor, Fairchild and Harris Semiconductor. Bernard has published over 700 articles in industry journals under his own byline. He received his BA in Physics and D. Phil in Nuclear Physics from the University of Oxford.
Manish Pandey - Synopsys
Manish Pandey is vice president R&D and Fellow at Synopsys, and an Adjunct Professor at Carnegie Mellon University and a co-author of the first edition of this book. He completed his PhD in Computer Science from Carnegie Mellon University and a B. Tech. in Computer Science from the Indian Institute of Technology Kharagpur. He currently leads the R&D teams for formal and static technologies, and machine learning at Synopsys. He previously led the development of several static and formal verification technologies at Verplex and Cadence which are in widespread use in the industry. Manish has been the recipient of the IEEE Transaction in CAD Outstanding Young author award and holds over two dozen patents and refereed publications.
Rajeev Ranjan - Synopsys
Dr. Rajeev Ranjan is group director of Applications Engineering at Synopsys for its flagship formal verification product, Synopsys VC Formal. Prior to Synopsys, Dr. Ranjan spent 10+ years at Jasper Design Automation in the role of Chief Technology Officer and VP of Application Engineering developing Jasper, followed by 5+ years at Cadence Design Systems in customer engagement and business development in all areas of verification. Dr. Ranjan is a long-term veteran in formal design verification, has published several papers and holds numerous patents in this area. Dr. Ranjan received his bachelor’s degree from IIT Kanpur, master’s degree from Urbana Champaign, and PhD from UC Berkeley. He also holds MBA degree from Wharton School of Business, University of Pennsylvania.
Sean Safarpour - Synopsys
Sean Safarpour is group director of R&D at Synopsys, where he leads the development of VC Formal and all its Apps. Prior to this, he led the Application Engineering team for VC Formal and worked closely with customers to solve some of their most challenging verification problems with the help of formal verification. He is also a co-author of the first edition of this book. Prior to Synopsys, Sean was Director of R&D at Atrenta focused on new technology, and VP of Engineering and CTO at Vennsa Technologies, a start-up focused on automated root-cause analysis using formal techniques. Sean received his PhD from the University of Toronto where he completed his thesis entitled “Formal Methods in Automated Design Debugging”.