Synopsys Keynote - Designing in the Age of AI
Speaker: Yankin Tanurhan, VP of Engineering, Synopsys
Few technologies over the past 50 years have had the potential for disruptive change in our society as artificial intelligence (AI). With technology industry giants and startups alike focused on bringing the capabilities of machine learning into a broad range of devices from the cloud to the edge, the race is on. This keynote will discuss the drivers for implementing AI across a broad range of chip architectures and technologies that are being embraced by leading design teams to accelerate the integration of AI into their SoCs.
Panel Section: Hardware security in future circuits: A feature? A process? Or a new gravity?
Security is a fast-evolving field. While the need for security in connected devices has become a consensus, how to define, implement and test hardware security properly is still an open question. Indeed, the entanglement between internet dusts has made the design of security more complicated than ever. This talk tries to offer an in-depth analysis of the challenges faced by the semiconductor industry when integrating hardware security, and to compare the pros and cons of mainstream security solutions. We will also discuss the interactions between industry, researchers, and certification testing standards. This is not a talk to offer detailed solutions, but rather some insights for security evolution.
Applying New Vision and Deep Learning Trends to Edge Applications
Speaker: Gordon Cooper, Product Marketing Manager, Synopsys
Embedding computer vision and deep learning at the edge remains challenging today because of the huge computational and memory requirements and due to the pace of innovation of algorithms for modern vision and sensing tasks. CNN graphs particularly are rapidly evolving to improve the accuracy and speed of learning and inference. Mapping these vision and deep learning algorithms on low power embedded platforms are demanding on computational complexity, bandwidth and accuracy. In this presentation, we will discuss the latest computer vision trends and deep learning techniques for embedded platforms and how these trends are shaping the latest enhancements to the DesignWare EV Embedded Vision Processor IP family.
Inuitive Breakthrough 3D/Vision/AI Processor Solution for Consumers Applications
Speaker: Johnson Lim, Marketing Director, Inuitive
Defending Your AI Models, Data, and Communication from Hackers
Speaker: Mathew Ma, Applications Engineer, Synopsys
Abstract: Artificial intelligence (AI) is bringing new waves of innovation and business models, powered by new technology for deep learning and a massive growth in investment. As AI becomes pervasive in computing applications from the cloud to the edge, so too does the need for high-grade security in all levels of the system. Security needs to be integral in the AI process from the start. Defending AI systems, their data, and their communications against hacking is critical for users’ safety and privacy, as well as for protecting businesses’ investments. This presentation describes why security is needed throughout AI ecosystems, provides case studies of the types of attacks, and offers implementation options to ensure a robust, secure system from the SoC level and up.
Implementing an Ultra-low Power Solution for Always-On, Smart Vision Applications
Speaker: Alex Lin, Product Manager, Himax Technologies
The need for intelligent computer vision solutions is increasing in the emerging market for edge devices. The Himax WiseEye 2.0 intelligent vision solution, leveraging a proprietary ARC processor-based ASIC, specializes in processing AI-based algorithms for ultra-low power, “always-on” image sensing. The ASIC’s advanced features enable inclusion of intelligent optical recognition in smart homes, smart buildings, security cameras, smart cars, and consumer IoT devices. WiseEye 2.0 is one of the most efficient intelligent vision solutions on the market, using less power and computing resources.
Leveraging Recurrent Neural Networks (RNNs) to Efficiently Process Sequential Data
Speaker: Elliot Cheng, Applications Engineer, Synopsys
Machine learning utilizing neural networks has improved task solving in multiple application domains. Convolutional neural networks (CNNs) revolutionized image processing algorithms, however, the use of CNNs for non-visual data sets has had more limited success. More state-aware processing is required for sequential data such as acoustical signals, natural language, and accelerometer-based gestures. Recurrent neural network (RNN) architectures such as Long Short-Term Memory (LSTM) leverage previous state (feedback) to determine the current state of the network. RNNs are algorithmically more complex and offer higher variability in terms of network topologies and building blocks, limiting usefulness of hardwired general purpose RNN engines. Programmable processing cores enable future-proofing as next generation neural networks are developed. Optimal implementation of RNN cells on a power efficient processor can provide outstanding performance and energy savings critical for deeply embedded solutions.
Safety First! Driving Functional Safety from the Processor Level for Automotive ADAS Systems
Speaker: Rich Collins, Product Marketing Manager, Synopsys
Drivers are the biggest uncertainty factor in cars, and advanced driver assistance systems (ADAS) are helping to mitigate human error and make the roads safer. Designing SoCs for ADAS applications, including lane departure warning, adaptive cruise control, and autonomous vehicles that can ‘see’ in fog, heavy rain, pitch darkness, and air pollution, requires ASIL Ready processor IP. In this presentation, we will describe the challenges of designing functionally safe processor IP that can meet the highest safety levels, up to ASIL D, for high-performance in-vehicle processing.
High Integration Automotive Radar SoC
Speaker: Hongquan Liu , Maketing Director, Calterah Semiconductor
Radar will play a more and more important role in ADAS and autonomous driving (AD). With the AD level increasing, the number of radar sensors in a vehicle will increase accordingly, and the performance of radar sensors are required to be higher whereas unit costs need to be lower. High integration will be the only way to solve the conflicts among those requirements. This talk will present the evolution of radar sensors that are used in ADAS and AD applications, and introduce Calterah’s new-generation radar SoC, which is a high integration product, in the points of view of both function and system.
Advanced Vector Floating Point DSP Processing for Automotive Applications
Speaker: Rick Wang, Applications Engineer, Synopsys
Automotive applications such as Advanced Driving Assist Systems (ADAS), engine management, and powertrain require increasing levels of complexity as well as high levels of precision and accuracy in terms of algorithms and data formats. As algorithm complexity grows, system architects are developing their algorithms with tools such as MATLAB, which work in high-precision data formats such as half and single precision floating point. These large amounts of computation need a specific core for large vector floating point DSP. The EV6x processor has three dedicated vector floating point computation pipes that gives industry-leading levels of throughput, as well as hardware acceleration for linear algebra mathematical functions.
Addressing IoT Connectivity Challenges with Low-power NB-IoT Modem Solutions
Speaker:Iboun Sylla, IoT Product Marketing and Chip Architect, Palma Ceia SemiDesign
Abstract: Low power IoT connectivity requires modem chipsets and integrated wireless options to enable cost-effective deployment. Narrow-band IoT (NB-IoT) is a key 3GPP cellular communication standard that makes this possible. This talk will cover the aspects of the NB-IoT protocol that make it a “go-to” technology for IoT and will highlight how both Palma Ceia SemiDesign and Synopsys applied their respective IP to provide a complete NB-IoT solution, shortening the time-to-market for developing IoT communication products such as multimode edge-based IoT devices or stand-alone chipsets.
Embedded Multicore Application Development with Zephyr and ARC Processors
Speaker: Wayne Ren, R&D Manager, Synopsys
Performance in Desktop, Server and HPC applications has been scaling rapidly in recent years via multicore, continuously increasing the number of cores on a processor chip. The same principle has been extending to embedded systems, where multicore designs are increasingly more pervasive in embedded applications such as 5G data processor, edge IoT machine learning and many more. This presentation will examine multicore application options and considerations using the Zephyr RTOS. We will introduce the Zephyr RTOS, its main features and multicore support models (AMP and SMP). We will discuss challenges associated with designing high-performance software applications for multicore and contrast AMP and SMP approaches using samples applications on modern ARC processors.