Synopsys eUSB2 Repeater converts between eUSB2 and USB 2.0 signaling levels. This enables an SoC design with eUSB2 PHY to connect to legacy USB 2.0 products. The Synopsys eUSB2 Repeater is designed for mature process nodes. The eUSB2 Repeater IP can be integrated in PMIC, Audio, Wi-Fi, combo Radio chips or implemented as a standalone (multi-port) repeater chip.
With over 3,000 design wins and over 4 billion silicon-proven units shipped, Synopsys' USB IP solution, consisting of digital controllers, PHYs, IP subsystems, and verification IP, enables designers to lower integration risk and speed time-to-market.
Synopsys eUSB2 IP Solution Datasheet
Enabling USB 2.0 in Advanced Process Nodes Using DesignWare eUSB2 IPUSB 2.0 has been around for over 20 years and is the world's most popular wired interconnect standard. Join Morten Christiansen and Gervais Fong as they discuss how the new eUSB2 standard enables USB 2.0 connectivity for SoCs in the most advanced process nodes.
Downloads and Documentation
- Designed for mature process nodes, such as 28nm
- Supports the USB 2.0 protocol and High Speed, Full Speed, and Low Speed data rates
- eUSB2 Repeater converts between eUSB2 and USB 2.0 signaling levels
- eUSB2 Repeater enables an SoC design with eUSB2 PHY IP to connect to legacy USB 2.0 products
|eUSB 2.0 PHY Repeater - TSMC 28hpcp18 x1, North/South (vertical) poly orientation||STARs