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The Synopsys USB 1.1 Hub Controller enables ASIC/ FPGA designers to implement a complete USB Hub. The USB 1.1 Hub Controller supports Full and Low speeds as defined by the USB specification. By utilizing Synopsys' production-proven USB 1.1 Hub Controller, designers can significantly reduce development time and engineering risk, and bring USB-based solutions to market faster. The RapidScript® utility enables designers to easily configure the device by setting the number of downstream ports. The Synopsys USB 1.1 Hub Controller is available in Verilog, facilitating synthesis into any ASIC/FPGA technology.
Highlights & Key Features
- Silicon proven
- Available in Verilog
- Supports low-speed and full speed devices on downstream ports
- Integrated DPLL for clock and data recovery
- 2 User configurable options
- 1 to 15 downstream ports
- 2 port power switching mode and over current protection
- Downstream device connect/disconnect detection
- Supports suspend/resume for power management
- Supports one interrupt endpoint in addition to endpoint 0
- Approximately 12K gates for four ports
- Test environment for integration testing
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