2025-05-20 11:16:24
The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or Dual-Role Device) with HDCP 2.2 content protection, verification IP, and IP subsystems. These elements accelerate development of advanced chip designs delivering video, data and power over a single Type-C connector. Synopsys USB 3.2 solution is certified by the USB-IF and Synopsys 1.4 Tx solution is certified by VESA.
The Synopsys USB-C 3.2/DisplayPort 1.4 IP is targeted for integration into SoCs that support connections to high-definition (HD), 2K, 4K, and 8K Ultra High Definition (UHD) display from mobile devices, set-top boxes and other applications requiring fast data transfer and output of high-resolution content. The Synopsys IP solution delivers up to 20 Gbps data rates and simplifies users’ USB connection with reversible plug orientation and cable direction, bi-directional power and the DisplayPort alternate mode. The DisplayPort 1.4 alternate mode uses existing SuperSpeed USB lanes over USB Type-C connectors and cables to deliver up to 32.4 Gbps maximum link bandwidth with each of the four lanes running at 8.1 Gbps. The Synopsys IP USB-C 3.2/DisplayPort 1.4 TX IP solution simplifies integration and reduces system-level costs by removing requirements for external crossbar switch components for the USB and DisplayPort datapaths.
The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution integrates HDCP 2.2 content security, which is required to play back UHD 4K and higher-resolution content over DisplayPort 1.4 alternate mode. It creates a secure connection between a source and display by using industry standard public key and advanced encryption algorithms for successful content transfer. Synopsys’ HDCP 2.2 content protection IP provides designers with a complete and highly secure implementation of the HDCP 2.2 standard, including the entire control plane processing with authentication and key exchange protocols, as well as key stream generation. Incorporating HDCP 2.2 content protection in the Synopsys USB-C 3.2/DisplayPort 1.4 TX IP solution helps designers meet the stringent compliance requirements of the DCP LLC licensing authority.
As the leading supplier of USB IP, Synopsys enables designers to accelerate the integration of high-performance USB Type-C connectivity into their SoCs, while enabling secure delivery of high-definition video content.
Highlights
Products
Downloads and Documentation
- USB-IF certified Synopsys USB 3.2 solution
- VESA certified Synopsys DisplayPort 1.4 Tx solution
- Industry’s only USB Type-C IP solution consisting of USB-C 3.2/DisplayPort 1.4 TX PHYs, USB-C 3.2/DisplayPort 1.4 TX controllers with HDCP 2.2 and HDCP 2.2 content protection, verification IP, and IP subsystems
- Solution supports USB Type-C, SuperSpeed USB 3.2 at 20 Gbps, SuperSpeed USB 3.1 at 10 Gbps, SuperSpeed USB 3.0 at 5 Gbps and High-Speed USB (USB 2.0) as well as DisplayPort 1.4 TX supporting RBR, HBR1, HBR2 and HBR3 bitrates
- Controllers support Device, Host, and Dual-Role Device USB-C 3.2 as well as DisplayPort 1.4 TX with HDCP 2.2 content protection
- Synopsys USB-C 3.2/DisplayPort 1.4 TX PHY optimized for USB Type-C connectivity, conforming to latest USB 3.2 and DisplayPort 1.4 specifications
- Supports Type-C Port Controller, Type-C Port Controller Interface and Type-C Port Manager specifications for flexible hardware and software partitioning
USB-C 3.2 DP/TX PHY, AR - TSMC N3P 1.2V , North/South poly orientation | STARs |
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USB-C 3.2 DP/TX PHY for GF 12LP+, North/South poly orientation | STARs |
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USB-C 3.2 DP/TX PHY for TSMC N3P, North/South poly orientation | STARs |
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USB-C 3.2 DP/TX PHY ebdaux for SS SF4E, North/South poly orientation | STARs |
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USB-C 3.2 DP/TX PHY ebdaux for TSMC N4C, North/South poly orientation | STARs |
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USB-C 3.2 DP/TX PHY ebdaux for TSMC N5, North/South poly orientation | STARs |
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Description: |
USB-C 3.2 DP/TX PHY ebdaux for SS SF4E, North/South poly orientation |
Name: |
dwc_usbc32dptx_ebdaux_phy_ss4lpens |
Version: |
3.08a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Application Notes C10 Hardware Emulation Application Note ( PDF | HTML )
DesignWare Cores Consumer 10G Type-C USB 3.2 DP ATE Test Bench (Doc Version: 3.07a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
Synopsys PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores Type-C USB3.2SSP+ / DP Alt PHY for SS4LPE (PHY Version: 3.08a) ( PDF | HTML )
Type-C USB3.2SSP+ / DP Alt PCS for the DesignWare Type-C USB3.2SSP+ / DP Alt PHY (PCS Version: 3.33a) ( PDF | HTML )
Type-C USB3.2SSP+ / DP Alt PCS for the DesignWare Type-C USB3.2SSP+ / DP Alt PHY (PCS Version: 3.53a) ( PDF | HTML )
Release Notes DWC USBC3.2 DP PHY x4 NS for SS 4LPE 1.2V Release Notes (PHY Version: 3.08a) ( TEXT )
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Download: |
dwc_usbc32dptx_ebdaux_phy_ss4lpens |
Product Code: |
E992-0 |
Description: |
USB-C 3.2 DP/TX PHY ebdaux for TSMC N5, North/South poly orientation |
Name: |
dwc_usbc32dptx_ebdaux_phy_tsmc5ffns |
Version: |
4.01c |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Application Notes DesignWare Cores Consumer 10G Type-C USB 3.2 DP ATE Test Bench (Doc Version: 3.07a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
Synopsys PHY IP Compilation Using the LC and FC End-User Platform (Doc Version: 1.11a) ( PDF | HTML )
Synopsys PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores Type-C USB3.2SSP+ / DP Alt PHY for TSMC5FF (PHY Version: 4.01c) ( PDF | HTML )
Type-C USB3.2SSP+ / DP Alt PCS for the DesignWare Cores Type-C USB3.2SSP+ / DP Alt PHY (PCS Version: 3.55a) ( PDF | HTML )
Reference Manual DesignWare Cores Type-C USB3.2SSP+ / DP Alt PHY for TSMC5FF Reference Manual (PHY Version: 4.01c) ( PDF | HTML )
Release Notes DWC USBC3.2 / DP for TSMC5FF 1.2V Release Notes (PHY Version 4.01c) ( TEXT )
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Download: |
dwc_usbc32dptx_ebdaux_phy_tsmc5ffns |
Product Code: |
E508-0 |
Description: |
USB-C 3.2 DP/TX PHY for TSMC N3P, North/South poly orientation |
Name: |
dwc_usbc32dptxphy_tsmc3pffns |
Version: |
4.55a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Application Notes Synopsys Compilation Using the LC and FC End-User Platform (Doc Version: 2022.03) ( PDF | HTML )
Synopsys PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 2.00b) ( PDF | HTML )
Synopsys PHY IP SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
Synopsys PHY IP Type-C USB3.2SSP+ / DP Alt PHY ATE Testbench Application Note (Document Version: 0.30a) ( PDF | HTML )
Databooks Synopsys PHY IP Type-C USB3.2SSP+ / DP Alt PHY for TSMC N3P Databook (PHY Version: 4.55a) ( PDF | HTML )
Synopsys PHY IP Type-C USB32SSP+/ DP Alt PCS for Type-C USB32SSP+/ DP Alt PHY PHY/PCS Wrapper Databook (PCS Version: 2.08h) ( PDF | HTML )
Reference Manual Synopsys PHY IP Type-C USB3.2SSP+ / DP Alt PHY for TSMC N3P Reference Manual (PHY Version: 4.55a) ( PDF | HTML )
Release Notes Synopsys PHY IP Type-C USB3.2SSP+ / DP Alt PHY for TSMC N3P Release Notes (PHY Version: 4.55a) ( TEXT )
User Guide DesignWare Cores USBC32/DP PHY coreKit User Guide (Doc Version: 0.10i) ( PDF | HTML )
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Download: |
dwc_usbc32dptxphy_tsmc3pffns |
Product Code: |
G240-0 |