2023-05-04 08:57:43
The DesignWare USB-C 3.1/DisplayPort 1.4 IP solution consists of USB-C 3.1/DisplayPort 1.4 PHYs, USB-C 3.1/DisplayPort 1.4 controllers (Device, Host, or Dual-Role Device) with HDCP 2.2 content protection, verification IP, and IP subsystems. These elements accelerate development of advanced chip designs delivering video, data and power over a single Type-C connector. Synopsys' DesignWare USB 3.1 solution is certified by the USB-IF and DesignWare 1.4 Tx solution is certified by VESA.
The DesignWare USB-C 3.1/DisplayPort 1.4 IP is targeted for integration into SoCs that support connections to high-definition (HD), 2K, 4K, and 8K Ultra High Definition (UHD) display from mobile devices, set-top boxes and other applications requiring fast data transfer and output of high-resolution content. The DesignWare IP solution delivers up to 10 Gbps data rates and simplifies users’ USB connection with reversible plug orientation and cable direction, bi-directional power and the DisplayPort alternate mode. The DisplayPort 1.4 alternate mode uses existing SuperSpeed USB lanes over USB Type-C connectors and cables to deliver up to 32.4 Gbps maximum link bandwidth with each of the four lanes running at 8.1 Gbps. The DesignWare IP USB-C 3.1/DisplayPort 1.4 TX IP solution simplifies integration and reduces system-level costs by removing requirements for external crossbar switch components for the USB and DisplayPort datapaths.
The DesignWare USB-C 3.1/DisplayPort 1.4 IP solution integrates HDCP 2.2 content security, which is required to play back UHD 4K and higher-resolution content over DisplayPort 1.4 alternate mode. It creates a secure connection between a source and display by using industry standard public key and advanced encryption algorithms for successful content transfer. Synopsys’ HDCP 2.2 content protection IP provides designers with a complete and highly secure implementation of the HDCP 2.2 standard, including the entire control plane processing with authentication and key exchange protocols, as well as key stream generation. Incorporating HDCP 2.2 content protection in the DesignWare USB-C 3.1/DisplayPort 1.4 TX IP solution helps designers meet the stringent compliance requirements of the DCP LLC licensing authority.
As the leading supplier of USB IP, Synopsys enables designers to accelerate the integration of high-performance USB Type-C connectivity into their SoCs, while enabling secure delivery of high-definition video content.
DesignWare SuperSpeed USB 3.1 IP Solution
Synopsys USB-C 3.1/DisplayPort 1.4 TX IP Complete Solution
Highlights
Products
Downloads and Documentation
- USB-IF certified DesignWare USB 3.1 solution
- VESA certified DesignWare DisplayPort 1.4 Tx solution
- Industry’s only USB Type-C IP solution consisting of USB-C 3.1/DisplayPort 1.4 TX PHYs, USB-C 3.1/DisplayPort 1.4 TX controllers with HDCP 2.2 and HDCP 2.2 content protection, verification IP, and IP subsystems
- Solution supports USB Type-C, SuperSpeed USB 3.1 at 10 Gbps, SuperSpeed USB 3.0 at 5 Gbps and High-Speed USB (USB 2.0) as well as DisplayPort 1.4 TX supporting RBR, HBR1, HBR2 and HBR3 bitrates
- Controllers support Device, Host, and Dual-Role Device USB-C 3.1 as well as DisplayPort 1.4 TX with HDCP 2.2 content protection1 DesignWare USB-C 3.1/DisplayPort 1.3 TX PHY optimized for USB Type-C connectivity, conforming to latest USB 3.1 and DisplayPort 1.3 specifications
- DesignWare USB-C 3.1/DisplayPort 1.4 TX PHY optimized for USB Type-C connectivity, conforming to latest USB 3.1 and DisplayPort 1.4 specifications
- Supports Type-C Port Controller, Type-C Port Controller Interface and Type-C Port Manager specifications for flexible hardware and software partitioning
DisplayPort 1.4 TX PHY, TSMC 12FFC, North/South Poly Orientation | STARs |
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DisplayPort 1.4 TX PHY, TSMC 16FFC, North/South Poly Orientation | STARs |
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DisplayPort 1.4 TX PHY, TSMC N4P, North/South Poly Orientation | STARs |
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DisplayPort 1.4 TX PHY, TSMC N5, North/South Poly Orientation | STARs |
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DisplayPort 1.4 TX PHY, TSMC N7, North/South Poly Orientation | STARs |
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DisplayPort Transmit Controller | STARs |
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SuperSpeed USB 3.1 Device Controller | STARs |
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SuperSpeed USB 3.1 DRD Controller | STARs |
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SuperSpeed USB 3.1 Host Controller | STARs |
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Description: |
DisplayPort 1.4 TX PHY, TSMC 12FFC, North/South Poly Orientation |
Name: |
dwc_dp14_tx_phy_tsmc12ffcns |
Version: |
1.03a |
ECCN: |
3E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes DesignWare Cores DP 1.4 TX ATE Test Bench for TSMC12FFC (Doc version: 1.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.60a) ( PDF | HTML )
Synopsys PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DP1.4 TX HDPCS for the DesignWare Cores DP1.4 TX PHY (PCS Version: 1.00) ( PDF | HTML )
DesignWare Cores DP1.4 TX AUX PHY for TSMC12FFC Databook (PHY Version: 1.03a) ( PDF | HTML )
DesignWare Cores DP1.4 TX PHY for TSMC12FFC Databook (PHY Version: 1.03a_d1) ( PDF | HTML )
Release Notes DWC DP1.4 PHY NS for TSMC 12FFC Release Notes (PHY Version: 1.03a) ( TEXT )
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Download: |
dwc_dp14_tx_phy_tsmc12ffcns |
Product Code: |
F822-0 |
Description: |
DisplayPort 1.4 TX PHY, TSMC 16FFC, North/South Poly Orientation |
Name: |
dwc_dp14_tx_phy_tsmc16ffcns |
Version: |
1.03a |
ECCN: |
3E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Application Notes DesignWare Cores DP 1.4 TX ATE Test Bench for TSMC12FFC (Doc version: 1.00a) ( PDF | HTML )
Synopsys PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DP1.4 TX HDPCS for the DesignWare Cores DP1.4 TX PHY for TSMC 16FFC (1.03a) ( PDF | HTML )
DesignWare Cores DP 1.4 TX PHY for TSMC16FFC Databook (PHY Version: 1.03a) ( PDF | HTML )
Release Notes DesignWare Cores DP 1.4 TX PHY for TSMC16FFC Release Notes (PHY Version: 1.03a) ( TEXT )
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Download: |
dwc_dp14_tx_phy_tsmc16ffcns |
Product Code: |
G944-0 |
Description: |
DisplayPort 1.4 TX PHY, TSMC N4P, North/South Poly Orientation |
Name: |
dwc_dp14_tx_phy_tsmc4ffpns |
Version: |
4.01c |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes DesignWare Cores DP 1.4 TX ATE Test Bench (Doc Version: 2.10a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.60a) ( PDF | HTML )
Synopsys PHY IP Compilation Using the LC and FC End-User Platform (Doc Version: 1.11a) ( HTML )
Synopsys PHY IP Consumer 10G Compilation Using the LC and FC End-User Platform (Doc Version: 1.11a) ( PDF )
Synopsys PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DP 1.4 PCS for the DesignWare Cores DP 1.4 TX PHY (PCS Version: 4.12b) ( PDF | HTML )
DesignWare Cores DP 1.4 TX PHY for TSMC4FFP Databook (PHY Version: 4.01c) ( PDF | HTML )
Reference Manual DesignWare Cores DP 1.4 TX PHY for TSMC4FFP Reference Manual (PHY Version: 4.01c) ( PDF | HTML )
Release Notes DWC Cores DP1.4 TX PHY NS for TSMC4FFP 1.8V Release Notes (PHY Version: 4.01c) ( TEXT )
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Download: |
dwc_dp14_tx_phy_tsmc4ffpns |
Product Code: |
H160-0 |
Description: |
DisplayPort 1.4 TX PHY, TSMC N5, North/South Poly Orientation |
Name: |
dwc_dp14_tx_phy_tsmc5ffns |
Version: |
4.01c |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Application Notes DesignWare Cores DP 1.4 TX ATE Test Bench (Doc Version: 2.10a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.60a) ( PDF | HTML )
Synopsys PHY IP Compilation Using the LC and FC End-User Platform (Doc Version: 1.11a) ( HTML )
Synopsys PHY IP Consumer 10G Compilation Using the LC and FC End-User Platform (Doc Version: 1.11a) ( PDF )
Synopsys PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DP 1.4 PCS for the DesignWare Cores DP 1.4 TX PHY (PCS Version: 4.12b) ( PDF | HTML )
DesignWare Cores DP 1.4 TX PHY for TSMC5FF PHY Databook (PHY Version: 4.01c) ( PDF | HTML )
Reference Manual DesignWare Cores DP 1.4 TX PHY for TSMC5FF Databook Reference Manual (PHY Version: 4.01c) ( PDF | HTML )
Release Notes DWC Cores DP1.4 TX PHY NS for TSMC5FF 1.8V Release Notes (PHY Version: 4.01c) ( TEXT )
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Download: |
dwc_dp14_tx_phy_tsmc5ffns |
Product Code: |
F820-0 |
Description: |
DisplayPort 1.4 TX PHY, TSMC N7, North/South Poly Orientation |
Name: |
dwc_dp14_tx_phy_tsmc7ffns |
Version: |
4.03a |
ECCN: |
3E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Application Notes DesignWare Cores DP 1.4 TX ATE Test Bench (Doc Version: 1.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.60a) ( PDF | HTML )
Synopsys PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DP 1.4 PCS for the DesignWare Cores DP 1.4 TX PHY (PCS Version: 4.10c) ( PDF | HTML )
DesignWare Cores DP 1.4 AUX I2C PHY for TSMC7FF Databook (AUX Version: 4.03a) ( PDF | HTML )
DesignWare Cores DP 1.4 TX PHY for TSMC7FF Databook (PHY Version: 4.03a) ( PDF | HTML )
Release Notes DWC Cores DP1.4 TX PHY NS for TSMC 7FF 1.8V Release Notes (PHY Version: 4.03a) ( TEXT )
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Download: |
dwc_dp14_tx_phy_tsmc7ffns |
Product Code: |
F821-0 |
Description: |
DisplayPort Transmit Controller |
Name: |
dwc_dptx |
Version: |
3.00a |
ECCN: |
3E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes Synopsys Controller IP DisplayPort Transmit Controller AppNote (Document Version 1.10) ( PDF | HTML )
Databooks DesignWare Cores DisplayPort Transmit Controller Databook (3.00a) ( PDF | HTML )
DesignWare Cores DisplayPort Transmit Controller Databook with Changebar (3.00a) ( PDF )
Installation Guide DesignWare Cores DisplayPort Transmit Controller Install Guide (3.00a) ( PDF )
Release Notes DesignWare Cores DisplayPort Transmit Controller Release Notes (3.00a) ( PDF )
User Guides DesignWare Cores DisplayPort Transmit Controller User Guide (3.00a) ( PDF | HTML )
DesignWare Cores DisplayPort Transmit Controller User Guide with Changebar (3.00a) ( PDF )
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Toolsets: |
Qualified Toolsets |
Download: |
dw_iip_DWC_dptx |
Product Code: |
G259-0, G260-0, I250-0 |
Description: |
SuperSpeed USB 3.1 Device Controller |
Name: |
dwc_usb_3_1_device |
Version: |
2.10a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes DesignWare Cores USB3.1 SSP PHY and Controller Integration Guide (App Note Version 1.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Packaged Verification Environment Application Note (App Note Version 1.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Simulation Debug Guide (App Note Version 1.00a) ( PDF | HTML )
Databooks Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook (2.10a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook - with Change Bars (2.10a) ( PDF )
Datasheets DesignWare SuperSpeed USB 3.1 IP Solution ( PDF )
Synopsys USB-C 3.1/DisplayPort 1.4 TX IP Complete Solution ( PDF )
Installation Guide Designware Cores Enhanced SuperSpeed USB 3.1 Controller Installation Guide (2.10a) ( PDF | HTML )
Programming Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide (2.10a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide - with Change Bars (2.10a) ( PDF )
Release Notes Designware Cores Enhanced SuperSpeed USB 3.1 Controller Release Notes (2.10a) ( PDF )
Training Videos Configuring DWC_usb3 Controller as a Device ( HTML )
DWC_usb3 Controller Clocks and Clock Synthesis ( HTML )
Managing Power in DWC_usb3 ( HTML )
User Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide (2.10a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide - with Change Bars (2.10a) ( PDF )
White Papers Addressing Three Critical Challenges of USB Type-C Implementation ( PDF )
USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
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Toolsets: |
Qualified Toolsets |
Download: |
dw_iip_DWC_usb31 |
Product Code: |
A868-0 |
Description: |
SuperSpeed USB 3.1 DRD Controller |
Name: |
dwc_usb_3_1_drd |
Version: |
2.10a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Application Notes DesignWare Cores USB3.1 SSP PHY and Controller Integration Guide (App Note Version 1.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Packaged Verification Environment Application Note (App Note Version 1.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Simulation Debug Guide (App Note Version 1.00a) ( PDF | HTML )
Databooks Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook (2.10a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook - with Change Bars (2.10a) ( PDF )
Datasheets DesignWare SuperSpeed USB 3.1 IP Solution ( PDF )
Synopsys USB-C 3.1/DisplayPort 1.4 TX IP Complete Solution ( PDF )
Installation Guide Designware Cores Enhanced SuperSpeed USB 3.1 Controller Installation Guide (2.10a) ( PDF | HTML )
Programming Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide (2.10a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide - with Change Bars (2.10a) ( PDF )
Release Notes Designware Cores Enhanced SuperSpeed USB 3.1 Controller Release Notes (2.10a) ( PDF )
Training Videos Configuring DWC_usb3 Controller as a Device ( HTML )
Configuring DWC_usb3 Controller as a Host ( HTML )
DWC_usb3 Controller Clocks and Clock Synthesis ( HTML )
Managing Power in DWC_usb3 ( HTML )
User Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide (2.10a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide - with Change Bars (2.10a) ( PDF )
White Papers Addressing Three Critical Challenges of USB Type-C Implementation ( PDF )
USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
Toolsets: |
Qualified Toolsets |
Download: |
dw_iip_DWC_usb31 |
Product Code: |
A871-0 |
Description: |
SuperSpeed USB 3.1 Host Controller |
Name: |
dwc_usb_3_1_host |
Version: |
2.10a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Application Notes DesignWare Cores USB3.1 SSP PHY and Controller Integration Guide (App Note Version 1.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Packaged Verification Environment Application Note (App Note Version 1.00a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Simulation Debug Guide (App Note Version 1.00a) ( PDF | HTML )
Databooks Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook (2.10a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook - with Change Bars (2.10a) ( PDF )
Datasheet DesignWare SuperSpeed USB 3.1 IP Solution ( PDF )
Installation Guide Designware Cores Enhanced SuperSpeed USB 3.1 Controller Installation Guide (2.10a) ( PDF | HTML )
Programming Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide (2.10a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide - with Change Bars (2.10a) ( PDF )
Release Notes Designware Cores Enhanced SuperSpeed USB 3.1 Controller Release Notes (2.10a) ( PDF )
Training Videos Configuring DWC_usb3 Controller as a Host ( HTML )
DWC_usb3 Controller Clocks and Clock Synthesis ( HTML )
Managing Power in DWC_usb3 ( HTML )
User Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide (2.10a) ( PDF | HTML )
Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide - with Change Bars (2.10a) ( PDF )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
Toolsets: |
Qualified Toolsets |
Download: |
dw_iip_DWC_usb31 |
Product Code: |
A869-0, A870-0, A872-0 |