Description: |
10G PHY for Differential Buffer, TSMC N5, North/South (vertical) poly orientation |
Name: |
dwc_diffbuf_tsmc5ff_ns |
Version: |
3.07a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Databook DesignWare Cores Differential Buffer for TSMC 5FF (PHY Version:3.07a_d1) ( PDF | HTML )
Release Notes DesignWare Cores Differential Buffer Release Notes for TSMC 5FF (PHY Version: 3.07a) ( TXT )
|
Download: |
dwc_diffbuf_tsmc5ff_ns |
Product Code: |
F690-0 |
| |
Description: |
10G PHY for Differential Buffer, TSMC N7, North/South (vertical) poly orientation |
Name: |
dwc_diffbuf_tsmc7ff_ns |
Version: |
2.09a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Databook DesignWare Cores Differential Buffer Databook for TSMC 7FF (PHY Version: 2.09a) ( PDF | HTML )
Release Notes DesignWare Cores Differential Buffer Release Notes for TSMC 7FF (PHY Version: 2.09a) ( TXT )
|
Download: |
dwc_diffbuf_tsmc7ff_ns |
Product Code: |
C522-0 |
| |
Description: |
PCIe 5.0 PHY NCS, TSMC N7 x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_ncs_tsmc7ff_x4ns |
Version: |
2.01a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High-Speed SerDes 32G PHY Gate-Level Simulations (Doc … ( PDF | HTML )
DesignWare Cores PCIe5 PHY ATE Testbench Application Note (Doc Version: 1.10a … ( HTML | PDF )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF | HTML )
DesignWare Cores SerDes PHY Temperature Sensor Procedure (Doc Version: 1.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databook DesignWare Cores PCIe 5 PHY x4 for TSMC 7FF Databook (PHY Version: 2.01a) ( PDF | HTML )
Reference Manual DesignWare Cores PCIe 5 PHY x4 for TSMC 7FF Reference Manual (PHY Version: 2.01a) ( PDF | HTML )
Release Notes DesignWare Cores PCIe 5 PHY x4 for TSMC 7FF Release Notes (PHY Version: 2.01a) ( TXT )
|
Download: |
dwc_pcie5phy_ncs_tsmc7ff_x4ns |
Product Code: |
G230-0 |
| |
Description: |
PCIe 5.0 PHY, NCS,TSMC N6 x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_ncs_tsmc6ff_x4ns |
Version: |
2.02a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High-Speed SerDes 32G PHY Gate-Level Simulations (Doc … ( PDF | HTML )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databooks DesignWare Cores PCIe 5 PHY x4 for TSMC 6FF Databook (PHY Version: 2.02a_d1) ( PDF | HTML )
PCIe 5.0 PCS for the DesignWare Cores PCIe 5.0 PHY x4 for TSMC 6FF PHY/PCS … ( PDF | HTML )
Reference Manual DesignWare Cores PCIe 5 PHY x4 for TSMC 6FF Reference Manual (PHY Version: … ( PDF | HTML )
Release Notes DesignWare Cores PCIe 5 PHY x4 for TSMC 6FF Release Notes (PHY Version: 2.02a) ( TXT )
|
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dwc_pcie5phy_ncs_tsmc6ff_x4ns |
Product Code: |
G102-0 |
| |
Description: |
PCIe 5.0 PHY, SS 4LPP x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_ss4lpp_x4ns |
Version: |
1.03c |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High-Speed SerDes 32G PHY Gate-Level Simulations (Doc … ( PDF | HTML )
DesignWare Cores PCIe5 PHY ATE Testbench Application Note (Doc Version: 1.10a … ( PDF | HTML )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databooks DesignWare Cores PCIe 5.0 PHY x4 for SS 4LPP Databook (PHY Version: 1.03c_d1) ( PDF | HTML )
PCIe 5.0 PCS for the DesignWare Cores PCIe 5.0 PHY x4 for SS 4LPP (PCS Version: … ( PDF | HTML )
Reference Manual DesignWare Cores PCIe 5.0 PHY x4 for SS 4LPP Reference Manual (PHY Version: … ( PDF | HTML )
Release Notes DesignWare Cores PCIe 5.0 PHY x4 for SS 4LPP Release Notes (PHY Version: 1.03c) ( TXT )
|
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dwc_pcie5phy_ss4lpp_x4ns |
Product Code: |
F472-0 |
| |
Description: |
PCIe 5.0 PHY, SS5LPE x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_ss5lpe_x4ns |
Version: |
1.02a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF )
DesignWare Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.10a) ( PDF | HTML )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databook DesignWare Cores PCIe 5 PHY x4 for SS 5LPe Databook (PHY Version: 1.02a) ( PDF | HTML )
Release Notes DesignWare Cores PCIe 5 PHY x4 for SS 5LPe Release Notes (PHY Version: 1.02a) ( TEXT )
|
Download: |
dwc_pcie5phy_ss5lpe_x4ns |
Product Code: |
F416-0 |
| |
Description: |
PCIe 5.0 PHY, SS7HPP x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_ss7hpp_x4ns |
Version: |
1.03a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Application Notes DesignWare Cores 32G PHY ATE Testbench (Doc Version: 1.0) ( PDF )
DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.10a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databook DesignWare Cores PCIe 5 PHY for Samsung LN7HPP Databook (PHY Version: 1.03a) ( HTML | PDF )
Release Notes DesignWare Cores PCIe 5 PHY for Samsung LN7HPP Release Notes (PHY Version: … ( PDF )
|
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dwc_pcie5phy_ss7hpp_x4ns |
Product Code: |
E128-0 |
| |
Description: |
PCIe 5.0 PHY, SS8LPP x1, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_ss8lpp_x1ns |
Version: |
1.02a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High-Speed SerDes 32G PHY Gate-Level Simulations (Doc … ( PDF | HTML )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF | HTML )
Databooks DesignWare Cores PCIe 5 PHY x1 for SS 8LPP Databook (PHY Version: 1.02a) ( PDF | HTML )
PCIe 5.0 PCS for the DesignWare Cores PCIe 5.0 PHY x1 for SS8LPP PHY/PCS … ( PDF | HTML )
Reference Manual DesignWare Cores PCIe 5 PHY x1 for SS 8LPP Reference Manual (PHY Version: 1.02a) ( PDF | HTML )
Release Notes DesignWare Cores PCIe 5 PHY x1 for SS 8LPP Release Notes (PHY Version: 1.02a) ( TXT )
|
Download: |
dwc_pcie5phy_ss8lpp_x1ns |
Product Code: |
F475-0 |
| |
Description: |
PCIe 5.0 PHY, SS8LPP x2, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_ss8lpp_x2ns |
Version: |
1.02a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Databooks DesignWare Cores PCIe 5 PHY x2 for SS 8LPP Databook (PHY Version: 1.02a) ( PDF | HTML )
PCIe 5.0 PCS for the DesignWare Cores PCIe 5.0 PHY x2 for SS8LPP PHY/PCS … ( PDF | HTML )
Reference Manual DesignWare Cores PCIe 5 PHY x2 for SS 8LPP Reference Manual (PHY Version: 1.02a) ( PDF | HTML )
Release Notes DesignWare Cores PCIe 5 PHY x2 for SS8LPP Release Notes (PHY Version: 1.02a) ( TXT )
|
Download: |
dwc_pcie5phy_ss8lpp_x2ns |
Product Code: |
F476-0 |
| |
Description: |
PCIe 5.0 PHY, SS8LPP x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_ss8lpp_x4ns |
Version: |
1.02a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High-Speed SerDes 32G PHY Gate-Level Simulations (Doc … ( PDF | HTML )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databooks DesignWare Cores PCIe 5 PHY x4 for SS8LPP Databook (PHY Version: 1.02a_d2) ( PDF | HTML )
DesignWare Cores PCIe 5 PHY x4 for SS8LPP PHY/PCS Wrapper Databook (PCS … ( PDF | HTML )
Reference Manual DesignWare Cores PCIe 5 PHY x4 for SS 8LPP Reference Manual (PHY Version: … ( PDF | HTML )
Release Notes DesignWare Cores PCIe 5 PHY x4 for SS8LPP Release Notes (PHY Version: 1.02a_d1) ( TXT )
|
Download: |
dwc_pcie5phy_ss8lpp_x4ns |
Product Code: |
F477-0 |
| |
Description: |
PCIe 5.0 PHY, TSMC N5 x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_tsmc5ff_x4ns |
Version: |
2.03b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High-Speed SerDes 32G PHY Gate-Level Simulations (Doc … ( PDF | HTML )
DesignWare Cores PCIe5 PHY ATE Testbench Application Note (Doc Version: 1.10a … ( HTML | PDF )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databooks DesignWare Cores PCIe 5 x4 PHY for TSMC 5FF Databook (PHY Version: 2.03b_d1) ( PDF | HTML )
PCIe 5.0 PCS for the DesignWare Cores PCIe 5.0 PHY x4 for TSMC 5FF PHY/PCS … ( HTML | PDF )
Reference Manual DesignWare Cores PCIe 5 PHY x4 for TSMC 5FF Reference Manual (PHY Version: … ( PDF | HTML )
Release Notes DesignWare Cores PCIe 5 PHY x4 for TSMC 5FF Release Notes (PHY Version: … ( PDF )
|
Download: |
dwc_pcie5phy_tsmc5ff_x4ns |
Product Code: |
E465-0 |
| |
Description: |
PCIe 5.0 PHY, TSMC N6 x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_tsmc6ff_x4ns |
Version: |
2.02a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High-Speed SerDes 32G PHY Gate-Level Simulations (Doc … ( PDF | HTML )
DesignWare Cores PCIe5 PHY ATE Testbench Application Note (Doc Version: 1.10a … ( PDF | HTML )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databooks DesignWare Cores PCIe 5 x4 PHY for TSMC 6FF Databook (PHY Version: 2.02a) ( PDF | HTML )
PCIe 5.0 PCS for the DesignWare Cores PCIe 5.0 PHY x4 for TSMC 6FF PHY/PCS … ( PDF | HTML )
Reference Manual DesignWare Cores PCIe 5 x4 PHY for TSMC 6FF Reference Manual (PHY Version: 2.02a) ( PDF | HTML )
Release Notes DesignWare Cores PCIe5 PHY x4 for TSMC 6FF Release Notes (PHY Version: 2.02a) ( TXT )
|
Download: |
dwc_pcie5phy_tsmc6ff_x4ns |
Product Code: |
E967-0 |
| |
Description: |
PCIe 5.0 PHY, TSMC N6 x6, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_tsmc6ff_x6ns |
Version: |
2.00a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF )
DesignWare Cores PCIe5 PHY ATE Testbench Application Note (Doc Version: 1.10a … ( HTML | PDF )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databooks DesignWare Cores PCIe 5 PHY x6 for TSMC 6FF Databook (PHY Version: 2.00a) ( PDF | HTML )
PCIe 5.0 PCS for the DesignWare Cores PCIe 5.0 PHY x6 for TSMC 6FF PHY/PCS … ( PDF | HTML )
Release Notes DesignWare Cores PCIe 5 PHY x6 for TSMC 6FF Release Notes (PHY Version: 2.00a) ( TXT )
|
Download: |
dwc_pcie5phy_tsmc6ff_x6ns |
Product Code: |
F981-0 |
| |
Description: |
PCIe 5.0 PHY, TSMC12FFC x2, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_tsmc12ffc_x2ns |
Version: |
3.00a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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DesignWare Cores |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High-Speed SerDes 32G PHY Gate-Level Simulations (Doc … ( PDF | HTML )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF | HTML )
DesignWare Cores SerDes PHY Temperature Sensor Procedure (Doc Version: 1.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databook DesignWare Cores PCIe 5 PHY for TSMC 12FFC Databook (PHY Version: 3.00a) ( PDF | HTML )
Release Notes DesignWare Cores PCIe5 PHY for TSMC 12FFC Release Notes (PHY Version: 3.00a) ( TXT )
|
Download: |
dwc_pcie5phy_tsmc12ffc_x2ns |
Product Code: |
G545-0 |
| |
Description: |
PCIe 5.0 PHY, TSMC12FFC x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_tsmc12ffc_x4ns |
Version: |
2.05a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.10a) ( PDF | HTML )
DesignWare Cores PCIe5 PHY ATE Testbench Application Note (Doc Version: 1.10a … ( PDF | HTML )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF | HTML )
DesignWare Cores SerDes PHY Temperature Sensor Procedure (Doc Version: 1.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databooks DesignWare Cores PCIe 5 PHY for TSMC 12FFC Databook (PHY Version: 2.05a) ( PDF | HTML )
PCIe 5.0 PCS for the DesignWare Cores PCIe 5.0 PHY (PCS Version: 1.55a) ( PDF | HTML )
Reference Manual DesignWare Cores PCIe 5 PHY x4 for TSMC 12FFCReference Manual (PHY Version: … ( PDF | HTML )
Release Notes DesignWare Cores PCIe5 PHY for TSMC 12FFC Release Notes (PHY Version: 2.05a) ( TXT )
|
Download: |
dwc_pcie5phy_tsmc12ffc_x4ns |
Product Code: |
E214-0 |
| |
Description: |
PCIe 5.0 PHY, TSMC16FFC x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_tsmc16ffc_x4ns |
Version: |
2.01b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.10a) ( PDF | HTML )
DesignWare Cores SerDes PHY Temperature Sensor Procedure (Doc Version: 1.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databooks DesignWare Cores PCIe 5 PHY for TSMC 16FFC Databook (PHY Version: 2.01b_d1) ( PDF | HTML )
PCIe 5.0 PCS for the DesignWare Cores PCIe 5.0 PHY Databook (PCS Version: 1.48a) ( PDF | HTML )
Datasheet Synopsys IP PHY IP for PCI Express 5.0 and CXL ( PDF )
Release Notes DesignWare Cores PCIe5 PHY for TSMC 16FFC Release Notes (PHY Version: 2.01b) ( TXT )
|
Download: |
dwc_pcie5phy_tsmc16ffc_x4ns |
Product Code: |
D347-0 |
| |
Description: |
PCIe 5.0 PHY, TSMC7FF G2, x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie5phy_g2_tsmc7ff_x4ns |
Version: |
3.00a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes DesignWare Cores 32G PHY IP Integration Review Checklist Application Notes (Doc … ( PDF | HTML )
DesignWare Cores High-Speed SerDes 32G PHY Gate-Level Simulations (Doc … ( PDF | HTML )
DesignWare Cores PCIe5 PHY ATE Testbench Application Note (Doc Version: 1.10a … ( PDF | HTML )
DesignWare Cores PHY External ROM and External SRAM Interfaces and … ( PDF | HTML )
DesignWare Cores SerDes PHY Temperature Sensor Procedure (Doc Version: 1.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.30a) ( HTML | PDF )
Databooks DesignWare Cores PCIe 5 PHY x4 Gen2 for TSMC 7FF Databook (PHY Version: … ( PDF | HTML )
PCIe 5.0 PCS for the DesignWare Cores PCIe 5.0 PHY x4 for TSMC 7FF PHY/PCS … ( PDF | HTML )
Reference Manual DesignWare Cores PCIe 5 PHY x4 Gen2 for TSMC 7FF Reference Manual (PHY … ( PDF | HTML )
Release Notes DesignWare Cores PCIe 5 PHY x4 Gen2 for TSMC 7FF Release Notes (PHY Version: … ( TXT )
|
Download: |
dwc_pcie5phy_g2_tsmc7ff_x4ns |
Product Code: |
F457-0 |