EDA
System
IP
SolvNetPlus
Training & Education
Comprehensive Power Noise and Reliability Signoff Solution for Analog Mixed-Signal Designs
Synopsys Totem is the industry’s trusted gold standard voltage drop (IR) and electromigration (EM) sign-off solution for transistor-level and mixed-signal designs. It delivers early feasibility analysis and efficient optimization with ‘what-if’ analysis with rich graphical user interface feedback. Totem is certified by all major foundries for technology nodes down to 1.6 nm with a track record of thousands of tapeouts.
Synopsys Totem-SC is cloud-optimized version of Totem based on the SeaScape elastic-compute platform that gives it ultra-high-speed performance and capacity to handle even the largest full-chip AMS design EM/IR analysis, including full HBM memories and CIS (CMOS image sensor).
Key Benefits
Features
Vectored and Vectorless Voltage Drop
Both static and dynamic voltage drop analyses can be driven by user-supplied activity vectors or by automatically generated ‘vectorless’ analysis.
Simulate Digital, Analog, and Package Together
Totem and Totem-SC can perform EM/IR analysis with combining both analog and digital layout into a single simulation run to ensure maximum accuracy, faster turnaround times, and ease-of-use. It can also include package and board models for chip-package-system co-analysis.
Analyze HBM and Large Designs with Totem-SC
Totem-SC leverages SeaScape, a big data elastic compute infrastructure for cloud execution of very large chips like memories and CMOC image sensors across thousands of CPU cores. Totem-SC delivers instant start, near-linear scalability, and high-capacity analysis with low per-core memory requirements.
Advanced Reliability Analysis
Totem and Totem-SC offer advanced analyses such as thermal-aware electromigration (EM) analysis. Totem can also include the substrate network for noise injection analysis, electrostatic discharge (ESD) integrity analysis, and standard cell library EM validation.
Early Feasibility Analysis
Totem and Totem-SC provide power grid weakness detection, missing via checks, and point-to-point analysis in early design stages—even before the design is LVS clean. This enables proactive grid planning, bump placement, and decoupling optimization for improved reliability.
IP Signoff and Hierarchical Model
Totem and Totem-SC generate hierarchical IP models for integrating analog blocks with digital SoC signoff with RedHawk-SC. This macro model accurately characterizes the electrical and physical properties of analog blocks across different operating modes and enables top-level voltage drop analysis and seamless integration.
Advanced Debug and What-If Analysis
Totem-SC and Totem’s GUIs offer customizable maps and debug views, enabling rapid identification and correction of design weaknesses. What-if analysis supports quick design fixes before finalizing changes, reducing turnaround time.
Thermal-Aware EM and Substrate Noise
Performs thermal-aware electromigration validation for standard cell libraries and radio frequency (RF) and power management ICs (PMICs), as well as substrate noise coupling analysis for mixed-signal and RF designs. Electrostatic discharge signoff is enabled in partnership with PathFinder-SC.
Multi-Die Design Support
Totem and Totem-SC support multi-die chip/package power and thermal analysis with RedHawk-SC Electrothermal, providing comprehensive coverage for advanced system architectures.
Technical Capabilities
Synopsys Totem and Totem-SC are certified by major foundries for finFET nodes down to 1.6nm, proven in thousands of tapeouts. They deliver early grid prototyping, thermal-aware EM, statistical EM budgeting, substrate noise, RDSON, and ESD analysis. The platforms extract power grid networks, support millions of transistor flat designs, and offer fast incremental and what-if analysis. Totem-SC’s cloud-native architecture enables ultra-high capacity and instant deployment for full-chip and IP-level verification.
FAQ
Both are supported for finFET processes down to 1.6 nm and are proven across many production tapeouts.
Yes, they enable single-simulation coverage for analog, mixed-signal, and digital components.
Totem-SC is a high-capacity version of Totem that leverages cloud-native elastic compute to analyze ultra-large designs with high speed and capacity.
Totem provides early analysis features, allowing detection of power grid weaknesses and EM risks before signoff.
Capabilities include thermal-aware EM, statistical EM budgeting, substrate noise analysis, and ESD signoff with PathFinder-SC.