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The Synopsys Universal Asynchronous Receiver and Transmitter (UART) is compliant to industry standard 16C450, 16C550, 16C650 or 16C750 UARTs and is available in numerous variations to best match the required application. The Synopsys UART has an AMBA® APB bus interface and optionally a DMA interface to off-load the central processing unit.

The available features of the Synopsys UART are completely software programmable via control registers, including enabling of receive and transmit FIFOs, automatic hardware flow control, fractional clock pre-scaling, automatic baud-rate detection, infrared encoding/decoding, and 9-bit multiprocessor/ multi-drop mode.

The Synopsys UART provides DMA mode data transfers through FIFO trigger levels and receive- and transmit-ready signals. Optionally, a FIFO-level interface and a DMA interface are available. On-board status registers provide the user with error indications, operational status, and modem interface control. System interrupts can be individually enabled/ disabled to meet user requirements. An internal loop-back capability allows on-chip diagnostics.

Highlights & Key Features

Highlights
Highlights + -

  • Key Benefits:
    • SW re-programmable, feature rich Synopsys UART
    • Low-level device driver included
    • Industry standard interfaces (AMBA® APB)
    • Area efficient solution
    • All available configurations in a single bundle
  • The UART supports the following functions:
    • Conforms to AMBA APB interface specification
    • Request/ response data flow DMA controller interface
    • Two independent clock domains for APB bus and UART logic
    • Break character transmission and reception
    • (Automatic) Hardware CTS/ RTS flow control
    • Full modem interface control signals (CTS, RTS, DSR, DTR, RI, DCD)
    • IrDA encoder/ decoder
    • 16-bit integer divider and fractional divider to support non-standard baud-rates
    • Non-standard baud rates at low clock frequencies using variable over sampling
    • Asynchronous wake-up interrupt when system clock is shut down
    • Standard asynchronous error and framing bits (start, stop, parity, overrun and break)
      • 5, 6, 7, or 8-bit characters
      • Even, odd, no-parity
      • 1, 1.5, or 2 stop bits
    • Multiprocessor/ Multidrop communication
    • Extensive transmit, receive, line-status and data set interrupts independently controlled
    • Programmable FIFO trigger levels
    • Loop-back controls for communication link fault isolation
  • Example Applications:
    • RS-232: Standard for point-to-point serial binary data communication, mostly used for computer serial ports
    • RS-422/ RS-423/ RS-485: Widely used as an interface for telecommunications, industrial, medical, security and networking applications. RS-422/ RS-423/ RS-485 are extended with multi-drop(RS-422/ RS-423) or multi-point (RS-485) communication to allow multi
    • LIN: The Local Interconnect Network (LIN) is a networking protocol commonly used for automotive network architectures.
    • IrDA: Infrared Data Association, a standard used for communication between devices
    • Bluetooth: Open standard for wireless communication over small distances over a Ultra High Frequency band
    • GPS: Global Positioning System, providing reliable positioning navigation and timing services to worldwide users on a continuous basis

    • Product Details

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