Synopsys Inter Integrated Circuit (I2C)

The Synopsys Inter Integrated Circuit (I2C) product is compliant to the industry standard I2C bus protocol and is available in multiple configurations to best match the user's application. It also has an AMBA® APB bus-compliant interface.

The I2C operation is controlled by software via the APB bus interface. For example, control registers are available to select the target address, 7-bit or 10-bit addressing mode and controller or target mode. Status registers provide internal status information, such as FIFO levels, level of I2C bus lines and interrupt status.

For power optimization, the device has two fully independent clocks: the APB clock for accessing control and status registers and the I2C controller clock (IP clock) for the main I2C function and the I2C clock generation. The APB clock may be switched off for low power operation.