The Synopsys MIPI® DSI/DSI-2 Host and Device Controller IP solutions are fully verified and configurable controllers that implement all the protocol functions defined in the latest MIPI DSI and DSI-2 specifications. The controllers provide a high-speed serial interface between an application processor and high-resolution displays. The Synopsys MIPI DSI/DSI-2 Host and Device Controllers support all commands defined in the MIPI Alliance Display Command Set (DCS) and interfaces with MIPI C-PHYs and D-PHYs that support the PHY Protocol Interface (PPI). The Synopsys MIPI DSI Host and Device Controller IP can be configured to handle 1 to 4 data lanes.
The Synopsys MIPI DSI/DSI-2 Host Controller supports the VESA DSC standard and enables dual MIPI DSI and DSI-2 use case enabling ultra high-definition resolution mobile systems. In addition, the controller is ASIL B Ready ISO 26262 certified, meeting the stringent requirements of automotive functional safety applications.
Synopsys MIPI DSI/DSI-2 Host and Device Controllers and C-PHY/D-PHY, and D-PHY IP provide a complete display interface IP solution that enables designers to lower their risk and cost of integrating the MIPI DSI and DSI-2 interfaces into application processors, display bridge integrated circuits (ICs) and multimedia coprocessors, while improving time-to-market.
Synopsys MIPI Complete Solution Datasheet
Synopsys MIPI DSI Device Controller IP Datasheet
Synopsys MIPI DSI Host Controller IP Datasheet
Synopsys MIPI DSI Host Controller IP with VESA DSC Encoder Datasheet
Synopsys Demonstrates MIPI Camera and Display Prototyping SystemSynopsys demonstrates proven system-level interoperability utilizing Synopsys' DesignWare MIPI CSI-2 and DSI host controller as well as the DesignWare MIPI D-PHY IP solution.
Downloads and Documentation
- Compliant with the MIPI DSI and DSI-2 specifications, v2.1
- Display Pixel Interface v2.00
- Display Bus Interface v2.00
- Display Command Set v1.4
- Stereoscopic Display Formats v1.0
- Support for dual MIPI DSI use case with VESA Display Stream Compression (DSC) v1.1 standard
- Support for video and command modes
- Wide PPI interface to C-PHY v1.2 and D-PHY v2.1
- Configurable up to 4 data lanes and 3 trios
- Bi-directional communication and escape mode support
- Programmable display resolutions
- Multiple peripheral support capability with configurable virtual channels
- Video mode pixel formats: RGB565, RGB666 packed and loosely, RGB888
- ECC and checksum capabilities
- Support for ultra-low power mode
- Fault recovery schemes
- Built-in features for production and in-system testing
- ASIL B Ready ISO 26262 certified
- Arm® AMBA® APB™ control and configuration