- All Products
- Software Integrity
- Semiconductor IP
- Verification
- Design
- Silicon Engineering
- Application Security Services
- Dynamic Analysis (DAST)
- Mobile Application Security
- Penetration Testing
- Managed Static Analysis
- All Services
- Software Security
- Silicon Design
- Community
- About Us
< All Products
< All Products
< All Products
< All Products
< All Products
< All Products
< overview
All Products
+ Software Integrity + Semiconductor IP + Verification + Design + Silicon Engineering + Optical Solutions< Software Integrity
< Software Integrity
Application Security Services
Dynamic Analysis (DAST) Mobile Application Security Penetration Testing Managed Static Analysis< Software Integrity
< Software Integrity
< Software Integrity
Blog
< Software Integrity
Support
< overview
Software Integrity
+ Application Security Products + Application Security Services + Resources + Training & Education Blog Support< Semiconductor IP
< Semiconductor IP
Memories & Libraries
Logic Libraries Memory Compliers Duet Packages HPC Design Kit Embedded Test & Repair Non-Volatile Memory< Semiconductor IP
< Semiconductor IP
Processor Solutions
ARC Processors Embedded Vision Processors Development Tools Operating Systems Ecosystems ASIP Tools< Semiconductor IP
< Semiconductor IP
< Semiconductor IP
< Semiconductor IP
< Semiconductor IP
< overview
< Verification
< Verification
< Verification
< Design
< Design
< Design
< overview
< Silicon Engineering
< overview
< main menu
< Solutions
< Solutions
Industry Solutions
Automotive Cloud Computing Financial Services Industrial Controls Systems Healthcare< Solutions
< overview
< All Services
< All Services
< All Services
< overview
< Software Security
< Software Security
Managed Services
< Software Security
Program Development & Design
Maturity Model (BSIMM) Maturity Action Plan (MAP) Policies & Standards Security Metrics Software Security-in-a-Box< Software Security
< Software Security
Support
< overview
Software Security
+ Software Security Services Managed Services + Program Development & Design + Training Support< Silicon Design
< Silicon Design
< Silicon Design
< Silicon Design
< main menu
< Community
< Community
< Community
< Community
Interoperability
ARC Access HAPS Connect HSPICE Integrator In-Sync System-Level Catalyst TAP-in VC Apps Access< Community
< Community
< Community
< overview
Community
+ Community + SNUG + Partners + Interoperability + Academic Programs + Company Blogs + BSIMM< About Us
< About Us
< About Us
< About Us
< About Us
DesignWare MIPI DSI Host and Device Controller IP Solutions
Integrating advanced peripherals such as multi-megapixel cameras and high-resolution screens into next generation devices brings new challenges to the industry in terms of power, time-to-market and overall system costs. To address these challenges, the MIPI® Alliance defines and promotes system-on-chip (SoC) and peripheral device interface specifications, such as the Display Serial Interface (DSI).
Compliant with the latest MIPI DSI specification, DesignWare® MIPI DSI Host and Device Controllers are fully-verified configurable IP solutions that provide a high-speed serial interface between an application processor and displays. DesignWare MIPI DSI Host Controller IP is also available with VESA DSC encoder. The integrated and configurable controller IP implements all protocol functions defined in the latest MIPI DSI and VESA DSC specifications. The IP reduces data transmission bandwidth to enable quad HD or 4K displays with refresh rates at 60Hz or higher. The DSC encoder is fully verified in a universal verification methodology (UVM) environment with complete code and functional coverages. It uses a comprehensive test image library to check against the VESA DSC v1.1 reference C model. Synopsys’ DesignWare MIPI DSI Host Controller IP, DesignWare MIPI Host Controller IP with VESA DSC encoder, DesignWare MIPI Device Controller IP and DesignWare MIPI D-PHY IP provide a complete display interface IP solution that enables designers to lower the risk and cost of integrating the IP into application processors, display bridge ICs and multimedia co-processors, while improving the time-to-market demand of mobile, IoT and automotive SoCs.
DesignWare MIPI Complete Solution Datasheet DesignWare MIPI D-PHY Datasheet DesignWare MIPI DSI Device Controller IP Datasheet DesignWare MIPI DSI Host Controller IP Datasheet DesignWare MIPI DSI Host Controller IP with VESA DSC Encoder Datasheet
| Synopsys Demonstrates MIPI Camera and Display Prototyping System Synopsys demonstrates proven system-level interoperability utilizing Synopsys' DesignWare MIPI CSI-2 and DSI host controller as well as the DesignWare MIPI D-PHY IP solution. |
Highlights
Products
Downloads and Documentation
- Compliant with the MIPI DSI v1.2 and VESA DSC v1.1 specifications
- Supports MIPI specifications:
- Display Pixel Interface (DPI-2) v2.00
- Display Bus Interface (DBI-2) v2.00
- Display Command Set (DCS) v1.3
- Stereoscopic Display Formats (SDF) v1.0
- Support video and command modes
- Configurable from 1 to 4 data lanes up to 2.5 Gbps per lane
- PPI interface to the D-PHY, as recommended in the MIPI D-PHY specification, v1.2
- Bi-directional communication and escape mode support
- Programmable display resolutions up to quad HD, 4K or higher
- Optimizes buffer size between MIPI DSI Hot Controller and DSC encoder
- Supports 24-bit and 30-bit RGB video mode pixel formats
- ECC and checksum capabilities
- Supports ultra-low power mode
- Multiple peripheral support capability with configurable virtual channels