Virtual Prototyping
Accelerate pre-RTL embedded software development, hardware/software integration, and system validation
Architecture Design
Quickly explore tradeoffs in your SoC architecture to achieve optimal product performance and cost to avoid over- or under-design
FPGA-Based Prototyping
Accelerate the creation of your ASIC prototype with a high-speed hardware prototyping environment including a comprehensive software flow
Core Optimization
Differentiate your product with the right combination of performance, power and area for your most design-critical cores
Design Flow Deployment
Optimize your design flow to address the latest design challenges
Physical Design Assistance
Leverage our tape-out proven flows and project experience to implement your very-deep submicron chip
IP Integration & SoC Verification
Get to market faster and reduce SoC design and verification cost by applying best practices in RTL creation and functional verification
Synopsys' DesignWare® MIPI DSI (Display Serial Interface) Host Controller IP is a configurable digital core that is compliant with the MIPI® Alliance DSI specification, providing a high-speed serial interface between an application processor and MIPI DSI-compliant display. The DesignWare MIPI DSI Host Controller IP is fully compliant to the Display Serial Interface (DSI), the Display Pixel Interface (DPI-2) and the Display Bus Interface (DBI-2) specifications.
When combined with the DesignWare MIPI D-PHY IP, Synopsys provides a single vendor MIPI DSI solution enabling designers to lower the risk and cost of integrating the MIPI DSI interface into application processors, display bridge ICs and multimedia co-processors while improving time-to-market of mobile electronics.
Synopsys Demonstrates MIPI Camera and Display Prototyping System Synopsys demonstrates proven system-level interoperability utilizing Synopsys' DesignWare MIPI CSI-2 and DSI host controller as well as the DesignWare MIPI D-PHY IP solution.
Hezi Saar Product Marketing Manager, DesignWare MIPI IP
