HSPICE

2018 HSPICE SIG (AMS verification) videolog

Accelerating Robust AMS Design

The 2018 HSPICE SIG presentations focused on HSPICE advancements in circuit verification techniques, including using Machine Learning, for accelerating robust AMS designs..

The Gold Standard for Accurate Circuit Simulation

HSPICE is the industry's "gold standard" for accurate circuit simulation and offers foundry-certified MOS device models with state-of-the-art simulation and analysis algorithms. With over 25 years of successful design tape outs, HSPICE is the industry's most trusted and comprehensive circuit simulator.

  • For on-chip simulation: Analog designs, RF design, custom digital design, standard cell design and characterization, memory design and characterization, and device model development.
  • For off-chip signal integrity simulation: Silicon-to-package-to-board-to-backplane analysis and simulation
  • Simulation environment
HSPICE Simulation

Accelerate Innovation with Analog/Mixed-Signal Verification

Synopsys addresses the most critical issues in AMS verification. HSPICE® is employed by leading semiconductor foundries to provide designers with the gold standard for accuracy in device modeling and precision circuit simulation. FineSim® is a multi-core accelerated circuit simulator well-suited for simulation of large, complex analog circuits, as well as DRAM/SRAM/Flash memory design. The CustomSim™ FastSPICE simulator delivers superior transistor-level verification performance and capacity for various classes of design, including custom digital, memory, and analog/mixed-signal circuits. HSPICE, FineSim, and CustomSim support a comprehensive set of reliability and variability analysis features, with the cornerstones being high-performance engines and common modeling and analyses technologies. For full-chip mixed-signal verification, Synopsys’ VCS® AMS mixed-signal verification solution combines the industry’s fastest RTL and circuit simulation engines (VCS, CustomSim or FineSim) to deliver the best performance and capacity for mixed-signal SoC regression testing for advanced functional and low-power verification.