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Automatically Synthesize and Model Coils and T-lines down to 3nm
Synopsys VeloceRF automates and accelerates the synthesis of inductors, Tcoils, transformers, and transmission lines that are optimized for your design. Starting with just the desired electrical and geometric parameters, VeloceRF creates a DRC-clean layout and the respective electromagnetic models for single or coupled inductors and transmission lines. It seamlessly blends in custom IC design flows to deliver accurate, ready-to-tape-out layouts for every technology node and metal option down to 3nm. It has never been easier to find the devices that meet design goals like size, cost, and reliability for your next-generation of RF and mm-wave applications.
Key Benefits
Features
Fast Device Synthesis
Instantly compile a large variety of single- or multi-spiral topologies and transmission lines enabling rapid design iteration and faster time-to-market. Automated synthesis produces DRC-clean devices that meet manufacturing standards. Integrated analysis lets designers explore multiple options efficiently, reducing development bottlenecks, and improving productivity for advanced silicon projects.
Advanced Spiral and Transmission Line Modeling
Model and analyze spiral inductors and transmission lines within seconds. The tool delivers detailed electromagnetic analysis of advanced features like dummy fill, patterned ground shields, guard rings etc. High-fidelity modeling supports accurate predictions of electromagnetic behavior, enabling robust and compact RF chip designs.
Parametric Sweep Optimization
Perform parametric sweeps to analyze device performance across a wide range of design variables for optimal selection in full circuit context. Unique coupling analysis among inductors ensures crosstalk failures are eliminated. Targeted solutions support complex RF environments and maximize device efficiency for demanding applications.
Extensive Device Library
Access to a comprehensive library of very flexible parametric cells, including single-spiral and multi-spiral inductors, transformers, baluns, T-coils, single-ended and differential transmission lines with different types of shielding, all ready for tape-out. These cells adapt automatically to design constraints and process rules, simplifying layout adjustments and reuse. Designers can quickly instantiate optimized devices for any project, enhancing productivity and scalability.
Extensive PDK Support and Design Flow Integration
Integrated with Synopsys Custom Compiler and other popular layout platforms, VeloceRF supports all major fabrication technologies and process nodes such as CMOS, BiCMOS, GaAs, SOS, and SOI. VeloceRF works with Synopsys IC Validator and other LVS tools to streamline workflows from synthesis to verification.
Millimeter-Wave Capability
When every dB and micron matter employing optimal spiral devices and transmission lines with silicon-proven accuracy is the foundation to building robust designs with predictable performance, yield and reliability for mm-wave applications like automotive radars. Modular layout structures like microstrip lines, coplanar waveguides, striplines, bends, and couplers provide LEGO-like flexibility. This enables innovative mm-wave design with the confidence needed at 77 GHz and beyond.
Layout Dependent Effects Modeling
VeloceRF includes the impact of layout-dependent effects during synthesis and modeling of passive devices. Thus, it ensures that electromagnetic extractions reflect true silicon behavior, enabling designers to achieve reliable performance and minimize costly design iterations, particularly when margins are tight.
Technical Capabilities
Synopsys VeloceRF enables detailed synthesis and modeling of spiral inductors and transmission lines, delivering ready-to-tape-out layouts and highly accurate electromagnetic models silicon-verified up to mm-wave frequencies. It models intricate layouts including dummy fill and ground shields including layout-dependent effects, thus ensuring close correlation between simulation and silicon.
The tool enables rapid geometry generation, parametric sweeps, and optimization, providing both compact models and S-parameters for seamless integration into standard design flows and foundry PDKs. By accurately modeling parasitics and supporting advanced process nodes down to 3nm, VeloceRF shortens design cycles, improves first-pass success, and reduces silicon area and cost through tighter device packing and minimized guard ring usage.
FAQ
The tools support all process nodes, including CMOS, BiCMOS, GaAs, SOS, and SOI, and integrate with leading foundry technologies worldwide.
The automated synthesis produces DRC-clean devices with foundry certified accuracy based on HFSS-IC, ensuring reliable tape-out and manufacturing.
The tool integrates seamlessly with Synopsys Custom Compiler and leading EDA platforms and foundry design kits, supporting Synopsys IC Validator and other LVS tools for streamlined workflows from synthesis to verification.
Models are delivered as additional views in the design library for flexible integration, with support for passive, causal, DC-accurate S-parameter and Rational Function Model (RFM) formats for fast circuit simulation.