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Training & Education
Why Attend?
Join Synopsys at this year’s AI Infra Summit featuring content designed for hardware providers, hyperscalers, and all enterprise IT and AI infrastructure specialists building fast, efficient, and affordable AI.
Synopsys has worked alongside many AI pioneers to enable the creation of the world's most advanced AI "super chips". Synopsys provides powerful enablement solutions such as reference flows, AI-focused design and verification tools, expert design services, and the industry's most comprehensive IP portfolio to meet the needs of AI SoCs. Don’t miss these Synopsys sessions at AI Infra Summit to learn how to maximize your design innovation.
Synopsys Sessions
As AI workloads continue to grow in complexity and scale, improving energy efficiency has become a critical design objective from Silicon to Systems. This tutorial explores a holistic approach to optimizing performance per watt across the entire hardware/software stack.
AI is transforming not just what chips can do, but how we design them. This panel of top investors and semiconductor leaders will explore how AI is accelerating chip development, lowering barriers to entry, and expanding who can participate in the next era of hardware innovation.
AI is emerging as a true collaborator—capable of reasoning through design trade-offs, iterating architectures, and navigating verification alongside human engineers. This comes at a time when chip development is costly and complex, often taking 3–5 years and over $100M, with a looming shortage of 1 million skilled workers by 2030. Startups face even higher hurdles compared to industry giants with vast data and teams. Can AI level the playing field and make chip creation faster, cheaper, and more accessible?
Today’s AI designs stress verification teams to an unprecedented extent. The compound complexity from software, hardware, interfaces, and architecture options leads to the challenge of running quadrillions of verification cycles across IP, sub-systems, SoCs, and Multi-die designs. Learn how industry leaders like AMD, Arm, Nvidia, and others address these challenges with Synopsys’ latest family of Hardware-Assisted Verification products, modularity of verification, and mixed-fidelity execution setups using virtual prototyping, emulation, and FPGA-based prototyping.
Startup Forum
AI Chip Design Startup Forum – Hosted by Plug and Play & Synopsys
Tuesday, September 9 | 4:00-6:00 p.m. PDT
Location: Room 209
Featured Panelists:
Mor Ben-Asher, CEO and Co-Founder, AI-Fabrics
Eric Norige, Co-founder, SW CTO, Baya Systems
Steve Majors, Sr. Vice President of Engineering, DreamBig Semiconductors
PiroozHojabri, CEO/CTO and Co-founder, IC Photonics LLC
Wilfred Gomes, CEO and Co-founder, Mueon Corporation
Moderated by: Sanjay Bali, Sr Vice President, Product Management Group Synopsys
Thinking of building your own AI Chip? Join us for a panel discussion, “Building & Scaling an AI Chip Startup,” where founders and leaders from AI chip startups will share their experiences and insights on growing their companies from initial idea to first tapeout and beyond. Discover how they addressed key challenges such as securing seed funding, hiring the right team, and identifying the best customer and market fit. We’ll also discuss how they tackled strategic and operational challenges to come out ahead in this dynamic industry.
