Built on AMD 3D Chiplet architecture and using 7nm process technology, AMD EPYC 7003 Processors with AMD 3D V-Cache technology employ advanced logic stacking based on a copper-to-copper hybrid bonding “bumpless” chip-on-wafer process. This delivers more than 200x the interconnect densities of current 2D CPU technologies (and over 15x the interconnect densities of other 3D CPU technologies using solder bumps) over AMD’s prior generation processors, helping to reduce latency, boost bandwidth, and enhance power and thermal efficiencies.[i]
Synopsys VCS®, the industry’s highest performance simulation solution, takes full advantage of AMD EPYC multicore processors with state-of-the-art fine-grained parallelism technology, enabling users to easily speed up high-activity, long-cycle tests by allocating more cores at runtime.
The need for increasing functionality from today’s large SoC designs is no secret. With EDA workloads being highly algorithmic in nature and requiring vast amounts of memory, the latest 3rd Gen AMD EPYC processors with AMD 3D V-Cache technology offer modern data centers increased performance for technical computing workloads. Synopsys VCS unlocks significant performance advantages by leveraging 768 MB of L3 cache. With the added L3 cache of standard 3rd Gen AMD EPYC processors and up to 64 “Zen 3” cores per processor, customers now have access to the best compiler technology and processor specifications to fuel next-generation designs.
“The volume of compute that Synopsys VCS runs on in the latest 3rd Gen AMD EPYC processors is massive. With the significant memory and cache required by today’s compute-intensive EDA workloads, the memory efficiency at runtime with VCS is exceptional and gives us a big competitive edge,” said Sandeep Mehrotra, vice president of engineering at Synopsys. “Our close collaboration with AMD continues to accelerate technology advances for our customers by empowering them to tackle verification challenges and the complexity of tomorrow’s SoCs.”
AMD EPYC 7003 Processors with AMD 3D V-Cache technology triples the amount of available L3[ii], helping deliver faster time-to-results on targeted workloads like EDA, CFD, and FEA software and solutions while providing socket compatibility with existing AMD EPYC 7003 platforms.[iii] By increasing the pool of L3 cache that is lower latency and closer to the core than main memory, AMD EPYC 7003 Processors with AMD 3D V-Cache utilize the same shared memory architecture as the rest of the 3rd Generation EPYC™ family.
“We designed the 3rd Gen AMD EPYC processors with AMD 3D V-Cache technology to give our customers exactly what they said they needed: increased performance, better energy efficiency, and lower total cost of ownership for critical technical compute workloads,” said Ram Peddibhotla, corporate vice president, EPYC product management, AMD. “With leadership architecture, performance, and modern security features, 3rd Gen AMD EPYC processors with AMD 3D V-Cache technology are an outstanding choice for complex simulations and rapid product development.”
Using the testbench and assertion capabilities built into VCS, AMD EPYC processor benchmarks for the Synopsys VCS functional simulator show that 16-core AMD EPYC 7003 Processors with AMD 3D V-Cache technology delivered an average 66% faster RTL verification[iv] compared to the standard 3rd Gen AMD EPYC7003 Series processors. Currently, Synopsys VCS is used by many of the world’s top semiconductor companies to catch defects early in the development process before a chip is committed to silicon.