During de Geus’ discussion with Dr. Ian Cuttress of Anandtech, he described that every major semiconductor milestone (i.e., moving from 200mm to 300mm wafers, planar to FinFET transistors, or DUV to EUV) requires the entire industry to jump onboard and scale costs.
“The use of machine learning in chip design, for use at multiple abstraction layers, will become a benefit that companies will use as a result of the current economic situation – the need to have the most optimized silicon layout for the use case required.”
Ultimately, AI enables 100 different configurations overnight, rather than one every few days. This will revolutionize how computer chips are made in this decade.
If you’d like to hear more about de Geus’ thinking on this topic, register for Hot Chips 33 (August 22-24), where he will be presenting the keynote presentation, “Does Artificial Intelligence Require Artificial Architects?”