What is SIPI SIG?

This event provides the opportunity for networking and proactive discussion with SIPI engineers to increase awareness of signal and power integrity issues within a forum for engaging dialog and education. Synopsys SIPI SIG is for Synopsys customers, and partners to update the audience about their offerings as well as for Synopsys to educate the audience about its SIPI offerings spanning EDA tools (PrimeSim circuit simulation and 3DIC Compiler), SIPI professional services, VIP and interface IP.

Why Attend?

Rapid advances in communication systems is driving data rates higher. High-performance systems with interconnects between package, substrate, PCB and backplane including multi-die systems require checking for signal and power rail quality or else risk failure. Faster data rates and more complex protocols are exacerbating SIPI compliance requirements, necessitating the need for smart design and compliance automation tools along with resource saving compliance verification services. Synopsys offers comprehensive SIPI analysis solutions and services that complement industry leading interface IP products. ​

Join us at this special interest group to see product demonstrations, hear from our technology experts and learn about real use cases from our customers and partners.​

Agenda

Please check back on this page for updates to the event agenda.


Welcome Reception
Wed. February 01, 2023
06:30 - 07:30 PM PST
Cocktail Hour & Product Demos
  • Product Demos
Dinner & Presentations
Wed. February 01, 2023
07:30 - 07:35 PM PST
Opening Remarks
Dinner & Presentations
Wed. February 01, 2023
07:35 - 07:50 PM PST
Successful DDR5 and LPDDR5 SI Analysis with HSPICE StatEye and IBIS-AMI Models
  • Randy Wolff, Principal Engineer, Silicon Signal Integrity Team, Micron Technology
Dinner & Presentations
Wed. February 01, 2023
07:50 - 08:05 PM PST
Simulation Strategies for a HBM Design
  • Venkat Satagopan, Senior Signal Integrity Engineer, Nvidia
Dinner & Presentations
Wed. February 01, 2023
08:05 - 08:20 PM PST
Signal/Power Integrity Co-simulation in High Speed Parallel Interfaces
  • Janani Chandrasekhar, Signal and Power Integrity Lead, Meta's Reality Labs
  • Ashkan Hashemi, Signal and Power Integrity Lead, Meta's Reality Labs
Dinner & Presentations
Wed. February 01, 2023
08:20 - 08:35 PM PST
Signal Integrity Analysis with MATLAB and HSPICE
  • Barry Katz, Director of Engineering, RF & AMS Products, MathWorks
Dinner & Presentations
Wed. February 01, 2023
08:35 - 08:55 PM PST
Q&A Discussion
  • Randy Wolff, Principal Engineer, Silicon Signal Integrity Team, Micron Technology
  • Venkat Satagopan, Senior Signal Integrity Engineer, Nvidia
  • Janani Chandrasekhar & Ashkan Hashemi, Signal and Power Integrity Lead, Package Design, Meta
  • Barry Katz, Director of Engineering, RF & AMS Products, MathWorks
Dinner & Presentations
Wed. February 01, 2023
08:55 - 09:00 PM PST
Closing Remarks & Raffle Prizes