2026 Signal & Power Integrity (SIPI) SIG Event

Traditional die‑to‑die (D2D) signal‑integrity (SI) optimization for UCIe‑A channels is a manual, engineer‑driven process that requires D2D design engineers and SIPI engineers to iteratively route, extract, and simulate real interposer layouts. This flow typically spans several weeks because each design iteration involves full APR, EM extraction, and human‑guided tuning of routing width, spacing, shielding strategy, and topology. With the increasing complexity of multi‑die systems, this manual approach limits design‑space exploration and often converges slowly to sub‑optimal SI performance.

In contrast, we propose an AI‑driven optimization flow using 3DSO.ai, an autonomous design‑space exploration solution integrated with 3DIC Compiler and HFSS EM solvers. 3DSO.ai automatically generates routing topologies, evaluates frequency‑domain SI metrics, and intelligently searches large parameter spaces using embedded machine learning. By submitting approximately 50 routed design candidates per optimization run, the tool rapidly converges on improved D2D layouts without manual tuning. As reported in the study, the total optimization cycle is reduced from multiple weeks to a few days, while delivering clear improvements in insertion loss, near‑end crosstalk, and far‑end crosstalk for UCIe‑A Gen2 32 GT/s interfaces. This demonstrates that post‑layout D2D optimization using Synopsys 3DSO.ai can significantly enhance SI quality while dramatically reducing engineering effort.

IBIS AMI is an extremely capable and ubiquitous modeling technology, and more recent versions of the IBIS standard support advanced features under AMI, including the Back Channel Interface (BCI).  But in an age where code, including for models, can be generated automatically, how do you know what a model is really doing?  In this presentation, attendees will see a working Synopsys HSPICE high-speed serial-differential simulation setup, but also what is “behind the scenes” in the implementation of a true back-channel-capable Tx-Rx pair, including where debug may be needed.  The presentation will close with of potential futures of IBIS AMI and BCI, and some hints about what the growth of AI means for the two formats.

This presentation describes a testbench built with SPICE language which connects the PDN of PCB, package and Die together. The S-Parameters were used as the PDN model of the PCB and the package; the CPM was used as the PDN model of the Die including the current profiles and the Rdie and Cdie. The Synopsys PrimeSim Spice was used to run this simulation, including the transient analysis and the AC impedance analysis. The goal of this simulation is to verify the PDN AC high-frequency noise and the AC impedance profile.

Electromagnetic (EM) modeling and circuit-level SI/PI analysis are often treated as separate steps in today’s design flows, creating gaps between physical accuracy and design sign-off metrics. This talk explores the automation challenges involved in linking geometry-aware EM extraction with circuit-level simulation. Practical tradeoffs, limitations, and lessons learned in bridging EM and circuit domains are discussed, with examples highlighting the impact on key SI/PI metrics.