Why Attend?

This virtual event provides an opportunity to stay informed about the latest innovations, techniques and methodologies in verification hardware and software. This 2-day event will share experiences and insights from users solving tough verification challenges using Synopsys solutions.

This year’s event will have a special focus on technology trends and case studies spanning simulation, static, formal, low power, VIP, emulation, and virtual prototyping. Attendees will leave with practical information to accelerate verification closure. 

Event Highlights

Synopsys CAD Navigation Users Group: Avalon & SysNav

We have planned an exciting event with presentations from a diverse group of CADNAV users in the semiconductor industry. You hear from three users who will be sharing their use cases and experiences with the software.  In addition, the CADNAV team will be presenting the product roadmap of upcoming features as well as the future vision of Synopsys CAD Navigation tools for IC and Package Failure Analysis.

Agenda | March 24, 2022

7:00am - 7:05am PT

Welcome

Arpan Bhattacherjee, Mgr., AE, Synopsys


7:05 - 7:30am PT

AvalonTM and SysNavTM CAD Navigation Updates and Roadmap from Synopsys 

Ankush Oberai, Group Dir., R&D, Synopsys
Rupa Kamoji, Dir., R&D, Synopsys
Arpan Bhattacherjee, Mgr., AE, Synopsys


7:30am - 8:00am PT

Building a High-Quality AvalonTM Database for FA Readiness 

Chi Yung Ng, Technical Program Manager, Intel Technology Sdn. Bhd.

Layout Versus Schematic (LVS) Database generation and management for foundry-level qualified data confidence for efficient and accurate failure analysis and isolation. 


8:00am - 8:30am PT

Global FA Enablement and Crusader Automation for CAD Conversion with AvalonTM

Eric Barbian, Member of Technical Staff, onsemi
Eric Sullivan, Sr. Principle EDA Engineer, onsemi

Workflow efficiency is of utmost importance when it comes to turnaround time and meeting time-to-market (TTM) objectives.  Onsemi global labs members, Eric and Eric, will share their automation flow with Avalon to optimize this efficiency to meet end goals.


8:30am - 9:00am PT

Accelerating Package Failure Analysis Using SysNavTM

Lesly Endrinal, Principal Failure Analysis Engineer, Qualcomm Technologies, Inc. 
Ginger Baker, Sr. Support Engineer, Database Administrator, Qualcomm Technologies, Inc.

For the very first time, Avanced Package-level CAD navigation use case will be shared on cutting edge moulded embedded packages (MEP).  Integration between IC and Package databases will uncover the truth behind package defects and bring to light answers we may have never seen in FA.