Synopsys HPC MACsec Security Modules for Ethernet

High-Performance Computing (HPC) environments are increasingly reliant on robust data security measures to protect sensitive information and maintain operational integrity. MACsec is the default security protocol for Ethernet HPC fabrics, providing foundational Layer 2 security that protects network communication against threats like DoS attacks, eavesdropping, and man-in-the-middle attacks. This ensures that each hop between nodes or switches is secured, making MACsec well-suited for securing HPC Ethernet environments.

The demand for enhanced security is further driven by regulatory requirements and standards, such as those from DOE, NASA, and EuroHPC, which mandate FIPS 140-3 or equivalent link protection for external or multi-tenant fabric links. As a result, MACsec is playing a pivotal role in the market due to its line-rate performance and lower latency overhead.

Synopsys’ HPC MACsec Security Modules provide confidentiality, integrity, origin authentication, and replay protection based on scalable AES-GCM cryptography enabling end-to-end security for Ethernet traffic up to 1.6 Tbps rates (MACsec IP scalable to 3.2 Tbps). The HPC MACsec Security Modules are highly-efficient, standards-compliant, inline full-duplex solutions that seamlessly integrate with the Synopsys Ethernet MAC & PCS IP. The solutions support scalable data rates with optimal latency, network prioritization, and diversity for a range of secure Ethernet connections.

The Synopsys HPC MACsec IP seamlessly interoperates with proven, Ethernet MAC, PCS IP and up to 224G Ethernet PHY IP to provide a complete, standards-based Ethernet MAC, PCS and PHY solution for systems up to 1.6T.

Learn about the broad portfolio of Security Solutions for Interfaces.


Synopsys HPC MACsec Security Modules for Ethernet Datasheet

 

Highlights
  • IEEE 802.1ae, IEEE 802.1br Support
  • 100 Gbps—1.6 Tbps
  • Can reach higher throughputs scalable to 3.2 Tbps
  • Supports also lower performance modes down to 10 Gbps
  • Scalable bifurcation solution for multi-port support, e.g.: 4x200 Gbps - 1x1.6 Tbps, …
  • Integrates with Synopsys MAC, PCS IP and Ethernet PHY IP
  • Plug and Play with Synopsys 1.6T, 800G, 400G, 200G and 100G MACs
  • FIFO generic interface support (for 3rd party MACs use case)
  • AES-GCM-XPN mode
  • Up to 1024 TX Security Associations
  • Up to 4096 RX Security Associations
  • Up to 6 VLAN on-the-clear modes (including Cisco standard)
  • Jumbo Frames
  • No performance drops to match full line rate per port (per clock cycle multi-packet processing)
  • Multi-Rule Lookup for MACsec and non-MACsec packets
  • APB5 with PNSE and PPROT for connecting to Secure Hosts and ARM CCA support
  • FIPS 140-3 certification readiness support (BIST, SRAM Zeroization,…)
  • Partitionable design for optimized backend implementation
  • Fixed latency mode