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As the threat level from adversaries increases, security countermeasures must be deployed to protect devices used in mission-critical environments. Motivations for copying or altering sensitive data, cloning devices and stealing valuable IP are abundant. In aerospace and defense, nation-state attacks can result in loss of IP, leakage of classified information and compromised national security.
Synopsys PUF FPGA-A for Altera FPGAs is a secure key generation and key vault solution that enables users of Altera StratixTM and AgilexTM FPGA devices to augment security with intrinsically generated, device-unique cryptographic keys. Keys derived with Synopsys PUF FPGA-A are never stored but are reliably reconstructed when required, providing a significantly higher security assurance.
Synopsys PUF FPGA-A uses SRAM as a physical unclonable function or PUF source. Based on the randomness inside uninitialized SRAM the IP generates the entropy needed for a strong hardware root of trust. The Altera Secure Device Manager (SDM), of which Synopsys PUF FPGA-A is the hardware root of trust, is NIST-aligned security IP.
Highlights
- Proven SRAM PUF implementation for Altera FPGAs, part of the Secure Device Manager
- Offers Altera FPGA users a cryptographic technology to secure their own keys and to authenticate devices and communications between them on networks
- Offers key provisioning, wrapping, and unwrapping to enable secure key storage across the supply chain and for the lifetime of the device
- Keys are never stored, but re-created from the SRAM PUF each time they are needed, offering a higher level of security than traditional key storage in NVM
- Keys are bound to the device and can only be recreated and accessed on the device they have been created on
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